CPU Design Verification Engineer
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PHYSICAL DESIGN ENGINEER 2
PRIMARY PURPOSE:
Provide technical expertise for the execution of the functional verification strategy for next-generation microprocessor designs. Maintain and enhance existing functional verification methodology. Improve existing infrastructure. Work on related projects and/or assignments as needed, to meet team goals. Perform project definition, training, and documentation. Develop quality, timely, and cost-effective solutions independently. Interface with architects and TG/PG RTL/Designers. Develop an effective working relationship with the parties involved.
KEY JOB FUNCTIONS:
- Perform functional feature verification of high-speed Microprocessor designs, including the development of infrastructure, directed and random test suites at behavioral RTL level across SoC, Core, and block hierarchies.
- Develop environments, infrastructure, and test plans to accommodate both full chip and stand-alone block-level verification and debug capabilities using simulation tools, debug tools, and programming skills, based on an in-depth understanding of the architecture and HDL/logical design of the microprocessor.
- Develop an automated regression infrastructure setup for functional verification of high-speed microprocessor designs.
- Based on a thorough understanding of the design architecture, develop, run, and debug x86 assembly-based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design leveraging C/C++/Perl/assembly programming, logic design, and simulation skill set.
- Resolve all simulation discrepancies and assertion responses for both behavioral and gate-level logic models.
- Measure and analyze coverage results and take necessary actions to fill in coverage holes.
PREFERRED EXPERIENCE:
- Understanding or technical expertise in functional verification of microprocessor designs.
- Experience with Verilog/System Verilog HDL, programming in Perl, C/C++, and logic simulation is a requirement.
- Direct experience with Verilog simulators is a plus.
- Very strong understanding of computer architecture and assembly programming.
- Good communication skills.
ACADEMIC CREDENTIALS:
MS or Ph.D. with some industry co-op experience desired (all degrees are related to CS or EE).
#LI-HS3
#LI-HYBRID
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
PHYSICAL DESIGN ENGINEER 2
PRIMARY PURPOSE:
Provide technical expertise for the execution of the functional verification strategy for next-generation microprocessor designs. Maintain and enhance existing functional verification methodology. Improve existing infrastructure. Work on related projects and/or assignments as needed, to meet team goals. Perform project definition, training, and documentation. Develop quality, timely, and cost-effective solutions independently. Interface with architects and TG/PG RTL/Designers. Develop an effective working relationship with the parties involved.
KEY JOB FUNCTIONS:
- Perform functional feature verification of high-speed Microprocessor designs, including the development of infrastructure, directed and random test suites at behavioral RTL level across SoC, Core, and block hierarchies.
- Develop environments, infrastructure, and test plans to accommodate both full chip and stand-alone block-level verification and debug capabilities using simulation tools, debug tools, and programming skills, based on an in-depth understanding of the architecture and HDL/logical design of the microprocessor.
- Develop an automated regression infrastructure setup for functional verification of high-speed microprocessor designs.
- Based on a thorough understanding of the design architecture, develop, run, and debug x86 assembly-based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design leveraging C/C++/Perl/assembly programming, logic design, and simulation skill set.
- Resolve all simulation discrepancies and assertion responses for both behavioral and gate-level logic models.
- Measure and analyze coverage results and take necessary actions to fill in coverage holes.
PREFERRED EXPERIENCE:
- Understanding or technical expertise in functional verification of microprocessor designs.
- Experience with Verilog/System Verilog HDL, programming in Perl, C/C++, and logic simulation is a requirement.
- Direct experience with Verilog simulators is a plus.
- Very strong understanding of computer architecture and assembly programming.
- Good communication skills.
ACADEMIC CREDENTIALS:
MS or Ph.D. with some industry co-op experience desired (all degrees are related to CS or EE).
#LI-HS3
#LI-HYBRID