Design Verification Engineer - NOC
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
We are seeking a seasoned IP or SOC verification engineer with expertise or significant interest in solving complex verification challenges. You have had significant success driving verification, better processes, and methodology changes in the past and are looking for your next challenge. As a lead Design Verification Engineer on the Infinity Fabric verification team you join a dedicated team whose work enables AMD to put multiple SoCs to market each year. The ground-breaking Fabric IP verified by this team is flexible and scalable and is integral to every new AMD product being developed across Client, Server, Graphics, Semi-Custom and embedded markets.
THE PERSON:
You are an experienced and very seasoned functional design verification engineer with exceptional programming skills in System Verilog and UVM. You have a passion for verification methodology and an extensive and proven track record verifying complex design blocks as well as a hunger to learn and improve. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are ready to take on problems.
KEY RESPONSIBILITIES:
- Develop and enhance UVM-based testbenches to verify new features for a state-of-the-art industry leading Data Fabric IP for AMD’s CPUs, GPUs and APUs
- Work closely with other verification engineers, designers, architects, and performance engineers to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
- Execute test plans for constrained-random and directed tests, new checks and functional coverage
- Provide technical guidance and innovative ideas to improve quality, processes and productivity
PREFERRED EXPERIENCE:
- Extensive and strong background in System Verilog and UVM methodologies
- Extensive experience with Architecting and developing complex verification environments and infrastructure, including scripting using Python, Perl, or similar.
- Proficient in Object Oriented programming, computer architecture and data structures.
- Extensive experience with process and methodology improvements to enhance verification quality and productivity
- Development of reusable code used over multiple product generations
- Extensive years of proven verification experience of complex CPU/ASIC projects, with demonstrated mastery of successful verification from test planning till tape out.
ACADEMIC CREDENTIALS:
- Bachelor’s or Master’s degree in related discipline preferred
LOCATION: Boxborough, MA
#LI-MR1
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE:
We are seeking a seasoned IP or SOC verification engineer with expertise or significant interest in solving complex verification challenges. You have had significant success driving verification, better processes, and methodology changes in the past and are looking for your next challenge. As a lead Design Verification Engineer on the Infinity Fabric verification team you join a dedicated team whose work enables AMD to put multiple SoCs to market each year. The ground-breaking Fabric IP verified by this team is flexible and scalable and is integral to every new AMD product being developed across Client, Server, Graphics, Semi-Custom and embedded markets.
THE PERSON:
You are an experienced and very seasoned functional design verification engineer with exceptional programming skills in System Verilog and UVM. You have a passion for verification methodology and an extensive and proven track record verifying complex design blocks as well as a hunger to learn and improve. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are ready to take on problems.
KEY RESPONSIBILITIES:
- Develop and enhance UVM-based testbenches to verify new features for a state-of-the-art industry leading Data Fabric IP for AMD’s CPUs, GPUs and APUs
- Work closely with other verification engineers, designers, architects, and performance engineers to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
- Execute test plans for constrained-random and directed tests, new checks and functional coverage
- Provide technical guidance and innovative ideas to improve quality, processes and productivity
PREFERRED EXPERIENCE:
- Extensive and strong background in System Verilog and UVM methodologies
- Extensive experience with Architecting and developing complex verification environments and infrastructure, including scripting using Python, Perl, or similar.
- Proficient in Object Oriented programming, computer architecture and data structures.
- Extensive experience with process and methodology improvements to enhance verification quality and productivity
- Development of reusable code used over multiple product generations
- Extensive years of proven verification experience of complex CPU/ASIC projects, with demonstrated mastery of successful verification from test planning till tape out.
ACADEMIC CREDENTIALS:
- Bachelor’s or Master’s degree in related discipline preferred
LOCATION: Boxborough, MA
#LI-MR1