Design Verification Engineer (Sr. Staff Level)
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to look at the opportunities available to come join our team.
Design Verification Engineer (Sr. Staff Level)
THE ROLE:
AMD is looking for a Design Verification Engineer willing to take on the challenge of becoming part of the PCIe Sub-System Design Verification team. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering AI, Servers, Graphics Cards and Personal Computers, as well as Gaming Consoles and VR sets. This team is responsible for the verification of several critical Sub-Systems as well as the integration of lower-level IPs and the Sub-System delivery to SoC, while making sure the architecture balances power consumption and performance. In this position, the engineer will enable delivering high complexity RTL code and Verification components to multiple AMD programs, and will be responsible for creating creating advanced testbenches using leading-edge verification techniques.
THE PERSON:
A successful candidate will be capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality. The candidate will be highly accurate, with pronounced attention to detail, strong analytical and problem solving skills, and excellent communication skills.
KEY RESPONSIBILITIES:
- Work with high-speed, low-power digital circuit designs from definition to implementation
- Verification of critical high-speed digital designs using both coverage driven random and directed testing techniques as well as Formal verification.
- Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more features or aspects of Sub-System level IP interoperability.
- Building testbench components as well as developing test and sequence libraries, by applying Objected Oriented Programming Verification techniques following UVM methodology, and using AI tools.
PREFERRED EXPERIENCE:
- Strong background in ASIC Design Flow
- Expertise in Design Verification
- Proficient in SystemVerilog and scripting languages like Python, Perl, Ruby, Makefile, shell
- Experience verifying complex designs using UVM, OVM or VMM
- Proficient in debugging firmware and RTL code using simulation tools
- Automating work flows in a distributed compute environment.
- Familiarity with industry standard high-speed protocols such as PCIe, SATA, USB or Ethernet is a plus
- Experience with AI tools used for RTL design, verification and debug is a plus
- Experience with verification of Hardware-Firmware interaction is highly desirable
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in Computer Engineering or Electrical Engineering
#LI-PL1
#LI-Hybrid
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to look at the opportunities available to come join our team.
Design Verification Engineer (Sr. Staff Level)
THE ROLE:
AMD is looking for a Design Verification Engineer willing to take on the challenge of becoming part of the PCIe Sub-System Design Verification team. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering AI, Servers, Graphics Cards and Personal Computers, as well as Gaming Consoles and VR sets. This team is responsible for the verification of several critical Sub-Systems as well as the integration of lower-level IPs and the Sub-System delivery to SoC, while making sure the architecture balances power consumption and performance. In this position, the engineer will enable delivering high complexity RTL code and Verification components to multiple AMD programs, and will be responsible for creating creating advanced testbenches using leading-edge verification techniques.
THE PERSON:
A successful candidate will be capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality. The candidate will be highly accurate, with pronounced attention to detail, strong analytical and problem solving skills, and excellent communication skills.
KEY RESPONSIBILITIES:
- Work with high-speed, low-power digital circuit designs from definition to implementation
- Verification of critical high-speed digital designs using both coverage driven random and directed testing techniques as well as Formal verification.
- Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more features or aspects of Sub-System level IP interoperability.
- Building testbench components as well as developing test and sequence libraries, by applying Objected Oriented Programming Verification techniques following UVM methodology, and using AI tools.
PREFERRED EXPERIENCE:
- Strong background in ASIC Design Flow
- Expertise in Design Verification
- Proficient in SystemVerilog and scripting languages like Python, Perl, Ruby, Makefile, shell
- Experience verifying complex designs using UVM, OVM or VMM
- Proficient in debugging firmware and RTL code using simulation tools
- Automating work flows in a distributed compute environment.
- Familiarity with industry standard high-speed protocols such as PCIe, SATA, USB or Ethernet is a plus
- Experience with AI tools used for RTL design, verification and debug is a plus
- Experience with verification of Hardware-Firmware interaction is highly desirable
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in Computer Engineering or Electrical Engineering
#LI-PL1
#LI-Hybrid