MTS Silicon Design Engineer
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
AMD S3 team is the Semi-Customized Unit. We design the APUs mainly for consoles and other Semi-Customized APU chips. Design Verification team is part of the whole chip design team and responsible to make sure the RTL quality. You will be working with front-end and IP team to verify the chip pervasive logic, GFX and multi-media IPs in SOC level.
THE PERSON:
KEY RESPONSIBILITIES:
- Develop test plan according to the specification and review with Architect and SOC/IP designer.
- Develop test scenarios to verify the design and analyze the coverage.
- Build the directed and random verification tests.
- Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues .
- Certain IP integrations to SOC.
- Complete the verification task before TO.
PREFERRED EXPERIENCE:
- Proficient in SoC level ASIC verification.
- Proficient in one kind of simulation tool like VCS, have good debug skill.
- Proficient in using UVM testbenches and working in Linux and Windows environments
- Familiar with SystemVerilog/C/C++ language.
- Familiar with script language like SHELL/Perl/Python.
- Developing UVM based verification frameworks and testbenches, processes and flows.
- Have experience for SOC level verification.
- Good written and spoken English
- Experience or knowledge on GFX or multi-media IPs would be a plus
ACADEMIC CREDENTIALS:
- Bachelor or Master, major in EE, CS or related area + 7 years working experience
LOCATION:
Shanghai
#LI-VC1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE:
AMD S3 team is the Semi-Customized Unit. We design the APUs mainly for consoles and other Semi-Customized APU chips. Design Verification team is part of the whole chip design team and responsible to make sure the RTL quality. You will be working with front-end and IP team to verify the chip pervasive logic, GFX and multi-media IPs in SOC level.
THE PERSON:
KEY RESPONSIBILITIES:
- Develop test plan according to the specification and review with Architect and SOC/IP designer.
- Develop test scenarios to verify the design and analyze the coverage.
- Build the directed and random verification tests.
- Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues .
- Certain IP integrations to SOC.
- Complete the verification task before TO.
PREFERRED EXPERIENCE:
- Proficient in SoC level ASIC verification.
- Proficient in one kind of simulation tool like VCS, have good debug skill.
- Proficient in using UVM testbenches and working in Linux and Windows environments
- Familiar with SystemVerilog/C/C++ language.
- Familiar with script language like SHELL/Perl/Python.
- Developing UVM based verification frameworks and testbenches, processes and flows.
- Have experience for SOC level verification.
- Good written and spoken English
- Experience or knowledge on GFX or multi-media IPs would be a plus
ACADEMIC CREDENTIALS:
- Bachelor or Master, major in EE, CS or related area + 7 years working experience
LOCATION:
Shanghai
#LI-VC1