MTS Software Development Eng.
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
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FPGA & ACAP Design and Compilation Tools
THE ROLE:
The Product Engineer position in the Software & AI Products group, located in Hyderabad, Telangana, India. AMD is looking for an experienced and motivated engineer to focus on tools specification, validation, documentation, and key customer’s support for FPGA & ACAP Design and Compilation tools.
THE PERSON:
The successful candidate will work closely with both the AMD tools R&D team, and emulation/prototyping internal and external customers on specific issues to improve Vivado implementation software quality of results, compile time and ease of use.
KEY RESPONSIBILITIES:
- Creating and tracking product development schedules and issues, and managing internal software development, as well as cross-functional projects with emulation, prototyping, hardware, marketing and field support teams
- Interfacing with Senior Management, Quality, Tech Marketing and Application teams to ensure issues are resolved and corrective actions completed
- Actively exploring innovative methodologies and analysis techniques aimed at scaling and productivity
- Deep-diving on new and critical tool issues seen by customers to identify workarounds and future enhancements
- Developing and delivering training materials on new features and methodologies
- Authoring high quality documentation tuned to the needs of the reader for their areas of expertise
- Staying current with and proposing the internal use of industry approaches, algorithms, and practices
PREFERRED EXPERIENCE:
- Customer Awareness: Has excellent working knowledge of RTL-based design flows and expectations
- Product Knowledge: Has excellent working knowledge of the entire FPGA or ASIC design process and tool flow, with in-depth expertise in timing analysis and closure. Has expertise in: HDL, Tcl (or Python), Timing and Physical Design Constraints (SDC/XDC), synthesis/placement/routing/verification tools
- Design Enablement: Expert in design analysis, experimentation and methodology for timing closure and runtime reduction
- Problem Solving: Ability to handle and solve complex system level issues, internally and with tier-1 customers
- Technical Communication: Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear
ACADEMIC CREDENTIALS:
MS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 8 years of relevant experience
#LI-NS2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
FPGA & ACAP Design and Compilation Tools
THE ROLE:
The Product Engineer position in the Software & AI Products group, located in Hyderabad, Telangana, India. AMD is looking for an experienced and motivated engineer to focus on tools specification, validation, documentation, and key customer’s support for FPGA & ACAP Design and Compilation tools.
THE PERSON:
The successful candidate will work closely with both the AMD tools R&D team, and emulation/prototyping internal and external customers on specific issues to improve Vivado implementation software quality of results, compile time and ease of use.
KEY RESPONSIBILITIES:
- Creating and tracking product development schedules and issues, and managing internal software development, as well as cross-functional projects with emulation, prototyping, hardware, marketing and field support teams
- Interfacing with Senior Management, Quality, Tech Marketing and Application teams to ensure issues are resolved and corrective actions completed
- Actively exploring innovative methodologies and analysis techniques aimed at scaling and productivity
- Deep-diving on new and critical tool issues seen by customers to identify workarounds and future enhancements
- Developing and delivering training materials on new features and methodologies
- Authoring high quality documentation tuned to the needs of the reader for their areas of expertise
- Staying current with and proposing the internal use of industry approaches, algorithms, and practices
PREFERRED EXPERIENCE:
- Customer Awareness: Has excellent working knowledge of RTL-based design flows and expectations
- Product Knowledge: Has excellent working knowledge of the entire FPGA or ASIC design process and tool flow, with in-depth expertise in timing analysis and closure. Has expertise in: HDL, Tcl (or Python), Timing and Physical Design Constraints (SDC/XDC), synthesis/placement/routing/verification tools
- Design Enablement: Expert in design analysis, experimentation and methodology for timing closure and runtime reduction
- Problem Solving: Ability to handle and solve complex system level issues, internally and with tier-1 customers
- Technical Communication: Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear
ACADEMIC CREDENTIALS:
MS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 8 years of relevant experience
#LI-NS2