RTL Design Engineer – Graphics
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
The main focus of this role will be to design, and deliver new and existing features for AMD’s graphics processor IP, resulting in an optimal implementation for power, performance, and area.
THE PERSON:
As the RTL Design Engineer – Graphics, you'll possess the following key attributes:
- A passion for modern, complex processor architecture, digital design, and hardware in general.
- Strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
- Team player with excellent communication skills and experience collaborating with other engineers located in different sites/time zones.
- Exposure to leadership or mentorship is an asset
KEY RESPONSIBILITIES:
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be implemented
- Build implementation plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
- Estimate the time required to implement the new features and any required changes to the surrounding logic
- Work with the verification team to specify design verification requirements
- Debug test failures to determine the root cause; work with DV and modeling engineers to resolve design defects and correct any design issues
- Carry a completed design through LINT and formal verification tools
- Address and correct potential timing issues
- Review functional and code coverage metrics – specify test constraints to meet the coverage requirements
PREFERRED EXPERIENCE:
- Proficient in IP level ASIC verification
- Proficient in debugging firmware and RTL code using simulation tools
- Experienced with Verilog, and System Verilog
- Graphics pipeline knowledge is beneficial
- Automating workflows in a distributed compute environment.
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
- Prefer exposure to Linux and Windows platforms
- Scripting language experience: Perl, Ruby, Makefile, shell preferred.
ACADEMIC CREDENTIALS:
- Undergrad degree required. Bachelors or Masters degree in Computer Engineering/Electrical Engineering is preferred
#LI-BM1
#LI-Hybrid
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE:
The main focus of this role will be to design, and deliver new and existing features for AMD’s graphics processor IP, resulting in an optimal implementation for power, performance, and area.
THE PERSON:
As the RTL Design Engineer – Graphics, you'll possess the following key attributes:
- A passion for modern, complex processor architecture, digital design, and hardware in general.
- Strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
- Team player with excellent communication skills and experience collaborating with other engineers located in different sites/time zones.
- Exposure to leadership or mentorship is an asset
KEY RESPONSIBILITIES:
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be implemented
- Build implementation plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
- Estimate the time required to implement the new features and any required changes to the surrounding logic
- Work with the verification team to specify design verification requirements
- Debug test failures to determine the root cause; work with DV and modeling engineers to resolve design defects and correct any design issues
- Carry a completed design through LINT and formal verification tools
- Address and correct potential timing issues
- Review functional and code coverage metrics – specify test constraints to meet the coverage requirements
PREFERRED EXPERIENCE:
- Proficient in IP level ASIC verification
- Proficient in debugging firmware and RTL code using simulation tools
- Experienced with Verilog, and System Verilog
- Graphics pipeline knowledge is beneficial
- Automating workflows in a distributed compute environment.
- Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
- Prefer exposure to Linux and Windows platforms
- Scripting language experience: Perl, Ruby, Makefile, shell preferred.
ACADEMIC CREDENTIALS:
- Undergrad degree required. Bachelors or Masters degree in Computer Engineering/Electrical Engineering is preferred
#LI-BM1
#LI-Hybrid