RTL Design Engineer
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE
We are looking for an adaptive, self-motivated design engineer to be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. As a key contributor, you will focus on RTL design and validation of high-speed interfaces such as Chip-to-Chip interconnect and highly configurable mufti-protocol PHYs. The design engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON
You have a passion for digital design, and verification. You are a team player, have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Perform RTL design of digital components.
- Work with functional verification team to meet coverage and quality standards.
- Analyze/fix Lint and CDC errors of the components.
- Guarantee quality/timely deliverables meeting project’s schedule.
- Help to improve/automate design process.
- Support post-silicon product bring-up/debug.
Preferred Experience:
Combined Experience or relevant course work in some of the following areas:
- SerDes/Memory/Chip-to-Chip interconnect PHY Designs
- Design of digital circuits and components using Verilog/System Verilog
- Debugging in digital and mixed-signal simulation environment.
- Power-optimization of digital designs.
- Multi-clock domain designs.
- Design constraints for synthesis and static timing analysis.
- Logic synthesis, timing closure, logical equivalence checking.
- Scripting languages such as Perl, Tcl, or Python.
- Excellent verbal and interpersonal communication skills.
Academic Credentials:
- BSEE + 2 Yrs. or MSEE+ 0–1-year experience designing digital components for high performance, low power FPGA/SOC.
Location: San Jose, CA
#LI-CS1
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE
We are looking for an adaptive, self-motivated design engineer to be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. As a key contributor, you will focus on RTL design and validation of high-speed interfaces such as Chip-to-Chip interconnect and highly configurable mufti-protocol PHYs. The design engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON
You have a passion for digital design, and verification. You are a team player, have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Perform RTL design of digital components.
- Work with functional verification team to meet coverage and quality standards.
- Analyze/fix Lint and CDC errors of the components.
- Guarantee quality/timely deliverables meeting project’s schedule.
- Help to improve/automate design process.
- Support post-silicon product bring-up/debug.
Preferred Experience:
Combined Experience or relevant course work in some of the following areas:
- SerDes/Memory/Chip-to-Chip interconnect PHY Designs
- Design of digital circuits and components using Verilog/System Verilog
- Debugging in digital and mixed-signal simulation environment.
- Power-optimization of digital designs.
- Multi-clock domain designs.
- Design constraints for synthesis and static timing analysis.
- Logic synthesis, timing closure, logical equivalence checking.
- Scripting languages such as Perl, Tcl, or Python.
- Excellent verbal and interpersonal communication skills.
Academic Credentials:
- BSEE + 2 Yrs. or MSEE+ 0–1-year experience designing digital components for high performance, low power FPGA/SOC.
Location: San Jose, CA
#LI-CS1