Sr. Silicon Design Engineer
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
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SENIOR SILICON DESIGN ENGINEER
THE ROLE:
The AMD Silicon Valley Cores Methodology Team is seeking a new team member to help investigate, develop, and deploy new techniques to optimize and analyze core timing and power to help create the next generation Zen CPU core for future iterations of Epyc™ servers and Ryzen™ desktop/notebook computers. As a member of our team, you’ll be responsible for collaborating with experts across various aspects of the CPU design flow, from RTL design to tape-out in the most advanced process nodes. In our group, your work will have widespread and immediate impact on the ongoing project.
WHAT YOU WILL GAIN:
- A big picture understanding of CPU design at multiple levels including –
o experience in the entire design process of bringing up a high-performance CPU at various stages of development
o insight into various domains of high speed and low power logic design through direct collaboration with both design and CAD experts
o understanding of how designs in development are linked to existing and future unannounced products that drive AMD’s overall strategy
- An extensive network of peers across various expertise and at a number of AMD sites; many opportunities to develop your future career
- Many chances to take on challenging problems that arise while working on the cutting-edge of technology
KEY RESPONSIBILIES:
- Develop high speed and low power VLSI design flows and tools in deep submicron fabrication processes
- Coordinate the efforts of physical design engineers, CAD engineers, and EDA vendors to deliver a leading edge, microprocessor design process
- Solve design and tool problems with ground-breaking approaches and champion innovation across the organization
- Foster collaboration and knowledge sharing through technical presentations towards peers and management
PREFERRED EXPERIENCE:
- VLSI circuit design
- High speed logic design and synthesis
- Timing analysis and optimization
- Low power design techniques
- Tool-driven place and route
- Gate-level design/verification
- Verilog
- Experience with tool scripting (e.g. Python/TCL)
ACADEMIC CREDENTIALS:
- MS in CS/EE or BS in CS/EE with industry experience
#LI-AJ1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
SENIOR SILICON DESIGN ENGINEER
THE ROLE:
The AMD Silicon Valley Cores Methodology Team is seeking a new team member to help investigate, develop, and deploy new techniques to optimize and analyze core timing and power to help create the next generation Zen CPU core for future iterations of Epyc™ servers and Ryzen™ desktop/notebook computers. As a member of our team, you’ll be responsible for collaborating with experts across various aspects of the CPU design flow, from RTL design to tape-out in the most advanced process nodes. In our group, your work will have widespread and immediate impact on the ongoing project.
WHAT YOU WILL GAIN:
- A big picture understanding of CPU design at multiple levels including –
o experience in the entire design process of bringing up a high-performance CPU at various stages of development
o insight into various domains of high speed and low power logic design through direct collaboration with both design and CAD experts
o understanding of how designs in development are linked to existing and future unannounced products that drive AMD’s overall strategy
- An extensive network of peers across various expertise and at a number of AMD sites; many opportunities to develop your future career
- Many chances to take on challenging problems that arise while working on the cutting-edge of technology
KEY RESPONSIBILIES:
- Develop high speed and low power VLSI design flows and tools in deep submicron fabrication processes
- Coordinate the efforts of physical design engineers, CAD engineers, and EDA vendors to deliver a leading edge, microprocessor design process
- Solve design and tool problems with ground-breaking approaches and champion innovation across the organization
- Foster collaboration and knowledge sharing through technical presentations towards peers and management
PREFERRED EXPERIENCE:
- VLSI circuit design
- High speed logic design and synthesis
- Timing analysis and optimization
- Low power design techniques
- Tool-driven place and route
- Gate-level design/verification
- Verilog
- Experience with tool scripting (e.g. Python/TCL)
ACADEMIC CREDENTIALS:
- MS in CS/EE or BS in CS/EE with industry experience
#LI-AJ1