Sr. Silicon Verification Engineer
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
SENIOR SILICON VERIFICATION ENGINEER
THE ROLE:
We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Develop/Maintain tests for functional verification at SOC level.
- Build testbench components to support the next generation IP
- Maintain or improve current verification libraries to support SOC/Full-chip level verification
- Provide technical support to other teams
- Help Hardware emulation team to port the RTL to Palladium/Zebu or HAPS/Protium platforms.
PREFERRED EXPERIENCE:
Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
Familiarity with Verilog and General Logic Design concepts
Knowledge of system-level architecture including buses like AXI/AHB, bridges, memory controllers such as
DDR4/DDR5, and peripherals such as USB, PCIe and Ethernet
Strong working knowledge of UNIX environment and scripting languages such as Perl or Python
Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM/XCELIUM, Verdi, QUESTASIM
Experience using UNIX Revision Control tools - ICM manage, CVS, Perforce and bug tracking tools such as JIRA
Experience in verifying multimillion gate chip designs from specifications to tape-out
Excellent communication and presentation skills
Demonstrate the ability to work with cross-functional teams
Familiarity with processors and boot flow would be useful
Familiarity with Software development flow including assembly and C is beneficial
ACADEMIC CREDENTIALS:
BS/MS EE, CE, or CS
4+ years of design verification experience
3+ years of OOP coding experience (System Verilog, SpecmanE or C++) and SV Assertions
#LI-MK1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
SENIOR SILICON VERIFICATION ENGINEER
THE ROLE:
We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Develop/Maintain tests for functional verification at SOC level.
- Build testbench components to support the next generation IP
- Maintain or improve current verification libraries to support SOC/Full-chip level verification
- Provide technical support to other teams
- Help Hardware emulation team to port the RTL to Palladium/Zebu or HAPS/Protium platforms.
PREFERRED EXPERIENCE:
Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
Familiarity with Verilog and General Logic Design concepts
Knowledge of system-level architecture including buses like AXI/AHB, bridges, memory controllers such as
DDR4/DDR5, and peripherals such as USB, PCIe and Ethernet
Strong working knowledge of UNIX environment and scripting languages such as Perl or Python
Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM/XCELIUM, Verdi, QUESTASIM
Experience using UNIX Revision Control tools - ICM manage, CVS, Perforce and bug tracking tools such as JIRA
Experience in verifying multimillion gate chip designs from specifications to tape-out
Excellent communication and presentation skills
Demonstrate the ability to work with cross-functional teams
Familiarity with processors and boot flow would be useful
Familiarity with Software development flow including assembly and C is beneficial
ACADEMIC CREDENTIALS:
BS/MS EE, CE, or CS
4+ years of design verification experience
3+ years of OOP coding experience (System Verilog, SpecmanE or C++) and SV Assertions
#LI-MK1