RTL Design Engineer
Job Overview:
Arm designs the technology that is at the heart of sophisticated digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. Arm improves people’s lives by enabling the intelligence in affordable, easy-to-use electronic products that transform the way we live and work. We work in partnership with a global network of leading technology companies which are using our experienced low-power technology. Together we are crafting the future of a better world.
Today, We are well recognized as the market leader in the CPU and System IP industry to name a few and this has been achieved by consistently delivering reliable and high-quality IP products. The cost of design and manufacturing and that warrants “right first time” approach for all IP and System products by our partners. Time-to-market is essential for our partners to look after steadfast competition in the marketplace, being first would enable them to get premium value from the end products.
Responsibilities:
As Senior/Staff Design Engineer, you will be a key contributor/leader in versatile RTL design team. You will own microarchitecture, RTL design, methodologies, process, planning etc. for CPU coherency IP of high performance, energy efficient microprocessors.
Responsibilities include
- Micro-architecture specification development and design
- Verilog and SystemVerilog RTL development and debug
- Writing Assertions for RTL code and proving it in Formal verification environment
- Working closely with validation, and implementation teams to meet all functional requirements, performance, power and area goals
- Planning, tracking, partner communication
- Line managing, coaching, mentoring and managing engineers/team
- Refining methodologies/process to improve efficiency/quality
- Exposure to formal verification is helpful
Required Skills and Experience :
- 5+ Years of relevant work experiencing in developing/leading sophisticated designs preferably of/around CPU/coherency/cache/interconnect/MMU/TLB
- Hands on experience using Verilog HDL for design
- Proven experience designing for targeted PPA. Sound ability to make right trade-offs around features, PPA, development cost, verification efficiency/quality etc.
- Ability to generate consistent, complete, and concise specifications
- Excellent communication (written, verbal, presentations) skills
- Co-operate and communicate well with other members of Arm both locally and across sites
- Show initiative in identifying solutions to problems of interest to Arm
- Be motivated to continuously develop skills and accept a variety of responsibilities.
- Some travel outside India to Arm may be required.
“Nice To Have” Skills and Experience :
Strong understanding of CPU Architecture/micro-architectures.
In Return:
Arm is an equal opportunity employer, committed to providing an environment of mutual respect, where equal opportunities are available to all applicants and colleagues. Arm prohibits discrimination or harassment of any kind based on race/ethnicity, religion, national origin, age, sex, sexual orientation, gender, gender identity and expression, disability, neuro-diversity, pregnancy, medical condition, marital status, citizenship status, military/veteran status, as well as those characteristics protected by applicable laws, regulations and ordinances.
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