Senior Design Verification Engineer
Job Overview:
Arm’s hardware is at the heart of computing and connectivity revolution that continues to transform the way people live and businesses operate. Working as a team and engaging with the world’s most famous technology companies, we are driving innovation into all areas that compute is possible to help us build better solutions for the billions of people using our technology worldwide. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated compute subsystems and solutions.
Responsibilities:
As a creative engineer with a knowledge of Subsystems and SoCs, you will be owning and leading the validation IP for subsystems/solutions.
Work with different project team to understand, review the requirements and architect the solution and deliver to respective project teams.
Key responsibilities will include owning the Architecture, Implementation, Validation/Verification debug methodology, developing and performing the test content, finding bugs. These IPs to be implemented for ASIC/FPGA/Emulation.
Close collaboration with different verticals (client/Infra/Auto SoCs)
Expected to own and lead to enhance the validation methodologies used by the team.
Will guide junior members of the team as needed to enable the successful completion of project activities.
Required Skills and Experience :
3 + Years of Experience!
- We need experience of IP/Subsystem/SoC
- Verilog, System-Verilog is must.
- You possess the knowledge of Validation test content using C, C++ etc.
- FPGA/emulation knowledge is optional.
- Good to have UVM knowledge and Knowledge of transactors.
- Ability to work under time-scale pressure and meet ambitious targets without compromising on quality.
- Understanding of the fundamentals of computer architecture and systems
- Practical experience of working on Processor based system designs is plus
- Knowledge of shell programming/scripting (e.g. Tcl Perl, Python etc.)
“Nice To Have” Skills and Experience :
Demonstrated understanding of CPU/ GPU subsystem in SoC environment and proven expertise in owning validation requirements & Validation Plan.
Hands on Experience in validating multiple sub systems for ASICs/ SoCs in system environment (across Emulation, FPGA and Development/Eval board), owning all phases of validation (Test development, Execution and Debug) for owned sub systems. Understanding of SoC security aspects
In Return:
At Arm, we are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape extraordinary.