Sr Advanced Semiconductor Engineer

Honeywell

Posted April 24, 2024

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<h3 style="padding: 0px;margin-top:0px;margin-bottom: 4px;">Innovate to solve the world's most important challenges</h3><p style="background: #FFFFFF; margin-bottom: 8pt"><span style="color: #000000; font-size: 10pt; font-family: "Segoe UI", sans-serif">The future is what you make it.</span></p><p style="background: #FFFFFF; margin-bottom: 8pt"><span style="color: #000000; font-size: 10pt; font-family: "Segoe UI", sans-serif">When you join Honeywell, you become a member of our global team of thinkers, innovators, dreamers and doers who make the things that make the future.</span></p><p style="background: #FFFFFF; margin-bottom: 8pt"><span style="color: #000000; font-size: 10pt; font-family: "Segoe UI", sans-serif">That means changing the way we fly, fueling jets in an eco-friendly way, keeping buildings smart and safe and even making it possible to breathe on Mars.</span></p><p style="background: #FFFFFF; margin-bottom: 8pt"><span style="color: #000000; font-size: 10pt; font-family: "Segoe UI", sans-serif">Working at Honeywell is not just about developing cool things. That is why all of our employees enjoy access to dynamic career opportunities across different fields and industries.</span></p><p style="background: #FFFFFF; margin-bottom: 8pt"><span style="color: #000000; font-size: 10pt; font-family: "Segoe UI", sans-serif">Are you ready to help us make the future?</span></p><p style="background: #FFFFFF; margin-bottom: 8pt"><span style="color: #000000; font-size: 10pt; font-family: "Segoe UI", sans-serif">Join a team that designs, verifies, integrates, and tests complex aerospace products within Honeywell. You will develop new products and processes in support of the organization's business strategies. You will be responsible for coding, running simulations, synthesis, creating test benches, and preparation of documentation. You will work closely with world class hardware and software engineers during planning, requirements and architecture, design, test, and integration phases. You will participate on project reviews and audits.</span></p><p style="line-height: normal"><b><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">Key Responsibilities</span></b></p><p style="margin-left: 66pt; line-height: 12pt; text-indent: -0.25in"><span style="color: #000000; font-size: 9pt; font-family: Symbol"><span>·<span style="font: normal normal normal normal 7pt / normal "Times New Roman"">       </span></span></span><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">Build Requirements, Design and Simulation</span></p><p style="margin-left: 66pt; line-height: 12pt; text-indent: -0.25in"><span style="color: #000000; font-size: 9pt; font-family: Symbol"><span>·<span style="font: normal normal normal normal 7pt / normal "Times New Roman"">       </span></span></span><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">ASIC/FPGA verification</span></p><p style="margin-left: 66pt; line-height: 12pt; text-indent: -0.25in"><span style="color: #000000; font-size: 9pt; font-family: Symbol"><span>·<span style="font: normal normal normal normal 7pt / normal "Times New Roman"">       </span></span></span><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">ASIC/FPGA design</span></p><p style="margin-left: 66pt; line-height: 12pt; text-indent: -0.25in"><span style="color: #000000; font-size: 9pt; font-family: Symbol"><span>·<span style="font: normal normal normal normal 7pt / normal "Times New Roman"">       </span></span></span><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">Integration and Test Support</span></p><p style="margin-left: 66pt; line-height: 12pt; text-indent: -0.25in"><span style="color: #000000; font-size: 9pt; font-family: Symbol"><span>·<span style="font: normal normal normal normal 7pt / normal "Times New Roman"">       </span></span></span><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">Provide Customer Support</span></p><p style="margin-left: 66pt; line-height: 12pt; text-indent: -0.25in"><span style="color: #000000; font-size: 9pt; font-family: Symbol"><span>·<span style="font: normal normal normal normal 7pt / normal "Times New Roman"">       </span></span></span><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">Prepare Documentation</span></p><p style="margin-left: 66pt; line-height: 12pt; text-indent: -0.25in"><span style="color: #000000; font-size: 9pt; font-family: Symbol"><span>·<span style="font: normal normal normal normal 7pt / normal "Times New Roman"">       </span></span></span><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">Mentor junior engineers</span></p><p> </p><h4>U.S. PERSON REQUIREMENTS </h4><p>Due to compliance with U.S. export control laws and regulations, candidate must be a U.S. Person, which is defined as, a U.S. citizen, a U.S. permanent resident, or have protected status in the U.S. under asylum or refugee status or have the ability to obtain an export authorization</p><p style="line-height: normal"><b><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">YOU MUST HAVE</span></b></p><ul type="disc"> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Bachelor's degree in Electrical or Computer Engineering</span></li> <li style="color: #000000; line-height: 12pt"><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">5+ years FPGA</span><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">/ASIC design/verification skills experience</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">2+ years experience using Microsoft office (Word, Excel, PowerPoint and Outlook)</span></li> </ul><p style="line-height: normal"><b><span style="color: #000000; font-size: 9pt; font-family: "Segoe UI", sans-serif">WE VALUE</span></b></p><ul type="disc"> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Verification background using System Verilog & UVM</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Good VHDL or Verilog working knowledge</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Professional knowledge of design tools: simulators, STA tools, synthesis, etc.</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Knowledge of AMBA, PCI, Ethernet, I2C, SPI, OS Linux, scripting languages Perl, Shell, TCL</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Secret clearance (preferred) </span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Cyber security background</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Good communication skills (verbal and written)</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Self-starter, motivated and takes initiative and able to work independently</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Strong technical problem-solving skills</span></li> <li style="color: #000000; line-height: 12pt"><span style="font-size: 9pt; font-family: "Segoe UI", sans-serif">Knowledge of DO-254 Airborne Electronic Hardware development lifecycle</span></li> </ul><h3 style="padding: 0px;margin-top: 10px;margin-bottom: 4px;">Additional Information</h3><ul><li style="margin-bottom: 1px;"><b>JOB ID: </b>HRD228586</li><li style="margin-bottom: 1px;"><b>Category: </b>Engineering</li><li style="margin-bottom: 1px;"><b>Location: </b>21111 N. 19th Ave (Deer Valley),Phoenix,Arizona,85027,United States</li><li style="margin-bottom: 1px;">Exempt</li><li style="margin-bottom: 1px;"></li></ul><div class="embed-responsive embed-responsive-16by9"><iframe src="https://www.youtube.com/embed/esXUrfWWuek">Global (ALL)</iframe></div><p class="eeotext">Honeywell is an equal opportunity employer. Qualified applicants will be considered without regard to age, race, creed, color, national origin, ancestry, marital status, affectional or sexual orientation, gender identity or expression, disability, nationality, sex, religion, or veteran status.</p>