Functional Verification Engineer (f/m/div)
Are you someone who is deeply passionate about electronics and desires to be a part of an exciting and ever-evolving environment within the semiconductor industry? Do you have a talent for collaborating effectively across cross-functional teams and leveraging your technical expertise to drive innovation? If this sounds like you, then take this opportunity and join us as a Functional Verification Engineer in Belgrade!
In your new role you will:
- Create and define verification plans
- Develop verification environments for our ICs using Universal Verification Methodology (UVM)
- Draw on test scenarios using SystemVerilog
- Verify functionality using the Constrained Random approach
- Develop assertions in SystemVerilog for simulation-based and formal verification
- Interact with other disciplines, such as Concept and Application Engineering, to define verification plans and strategies
- Provide proactive support to users of our verification environment
- Be responsible for our verification methods
- A degree in Electrical Engineering, Computer Science or a similar academic discipline
- At least 3 years of experience in Metric Driven Verification (digital and/or mixed-signal)
- Capabilities and experience in working with microcontroller-based ICs and ideally with security and safety requirements
- Excellent know-how with UVM especially using SystemVerilog
- Knowledge of firmware and RTL design is a plus
- Ideally have knowledge of Cadence verification software
- Fluency in English