Lead Principal Engineer Mixed-Signal Verification Methodology (f/m/d)
Infineon’s engineers develop state-of-the-art semiconductor solutions. This is only possible with a cutting-edge design flow and the best possible methodology as a basis. Do you want to lay the groundwork for how Infineon’s products of the future are optimized for robustness, power efficiency and highest performance? In this position, you will be able to let your innovations run wild and develop and deliver the best methodologies for our executive design engineers. This Position is part of our Technical Ladder: A special career path for those who share innovative ideas, demonstrate comprehensive technical knowledge, show thought leadership, possess-problem solving abilities and are able to create business value.
In your new role you will:
- Own, maintain and further develop the overall “big picture” for mixed-signal verification strategy to be prepared for future verification challenges
- Lead the further development of mixed-signal and digital verification methodologies and tools inside the Infineon´s chip development environment
- Drive and support further improvement of the methodology and tools for the generation of behavioral models for analog-centric and digital centric mixed-signal verification
- Lead the alignment with internal customers (developers) world-wide and EDA vendors on the requirements and take part in implementation projects in order to understand the requirements of next-generation products
- Drive verification efficiency and effectiveness by standardization and reuse as well as by university cooperation and verification expert communities
- Act as a technical advisor across organizational boundaries, making technical decisions and setting the direction in your field of expertise
You are best equipped for those tasks if you have:
- A degree in Electrical Engineering, Microelectronics or similar
- At least 8 years of professional experience with very deep understanding in mixed-signal and digital verification of IC designs
- Outstanding experience with EDA tools for mixed-signal and digital verification (Cadence XCelium/AMS-Designer, Synopsys VCS/XA) as well as testbench concepts and tools (UVM-MS, portable stimuli, etc.)
- Very profound knowledge of HDL languages (like VHDL/Verilog/SystemVerilog) with the ability to write synthesize-able and behavioral code (also real-number modelling)
- Deep understanding in writing scripts (like in Python, Perl and Shell)
- An independent and self-responsible working style within an international team
- Excellent English skills; German would be a plus