Principal Chip Verification Engineer (f/m/div)
Infineon Bristol is creating a brand-new team responsible for Chip Verification. Do you want to join this new team in a multinational company where you will be able to use your expertise in Chip Verification topics? Are you excited about the prospect of driving the development of innovative solutions while using state-of-the-art technologies? If you enjoy the idea of leaving your mark on the fast-changing world of automotive, we are looking forward to receiving your application.
As a Principal Chip Verification Engineer, you will be part of a dynamic team where you will play a crucial role in ensuring the success of our SoC verification efforts. Working closely with cross-functional teams, you will execute SoC verification tasks and write detailed verification plans that meet relevant functional and safety-related requirements. You will have the opportunity to advance SoC verification topics and work with cutting-edge technologies while working alongside a creative group of professionals.
In your new role, you will:
- Execute SoC verification tasks working closely with team members to review and understand the relevant functional and safety-related requirements;
- Write verification plans to meet the requirements after close alignment with other verification teams for proper work split according to mutually acceptable verification assignment;
- Execute the verification plan by developing C/C++ test cases and System Verilog/UVM Test Bench components and by integrating 3rd party VIP Components;
- Simulate and debug at RTL, Unit Delay, and Gate Level using appropriate tools and flows, including Emulator, Portable Stimulus, or Formal methodologies for functional and toggle coverage closure;
- Led a team technically by exploring new environments and identifying potential enhancement areas through new methodology;
- Identify and set mid/long-term goals based on benchmarking against industry standards.
You are best equipped for this role if you have:
- Master’s or bachelor’s degree in Electrical/Electronic Engineering or Computer Science;
- At least 10 years of experience in a Verification role at SoC level;
- Strong foundational knowledge of digital design & verification;
- Advanced knowledge and hands-on experience of System Verilog and UVM;
- Hands-on experience in hardware-software debugging at the system or application level;
- Exposure to version-controlling (eg, Git/Bitbucket, ClearCase, CVS, SVN) and bug-management schemes;
- Fluency in English.
It is an advantage if you also have:
- Hands-on experience with gate-level-simulations and debugging/troubleshooting;
- Knowledge on ISO26262 and ISO21434;
- Verification experience in COM, CPU peripherals, BUS, or pattern development;
- Experience in test bench/verification environment setup.
Please send us your CV in English.