Principal Engineer - Synthesis & STA

Infineon Technologies

Posted Jan. 24, 2024

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​Develop and implement high-performance, low-power, and area-efficient digital designs for ASICs and SoCs using industry-standard EDA tools.
In your new role you will:

You are best equipped for this task if you have:

Bachelors or Masters in Electrical/Electronics Engineering with 9+yearsof relevant experience.
Strong understanding of digital design principles, and experience with RTL coding in Verilog/SystemVerilog.
In-depth knowledge of synthesis methodologies and tools from leadingEDAvendors.
Experience with writing design constraints for synthesis, timingclosure,gate level simulation and pipelining at different levels forperformanceoptimization and timing closure.
Experience with power analysis and optimization flows such aspowergating, clock gating, voltage scaling, and dynamic voltage frequency scaling.
Experience with scripting languages such as Perl, Python, or Tcl.
Excellent problem-solving skills and ability to work independently andina team environment.
Strong communication and interpersonal skills, with the abilitytointeract effectively with cross-functional teams.
Proven track record of delivering successful designs on time and meeting performance, power, and area goals.