Senior Staff Engineer Digital Design for Microcontroller IPs (f/m/div)
Are you eager to contribute to the future of automotive technology? Become a key part of our Automotive Microcontroller Design & Verification team, where you’ll design cutting-edge microcontroller communication IPs for a variety of automotive applications. As a Senior Staff Engineer in Digital Design, you’ll play a pivotal role in ensuring the scalability of our microcontrollers across different device families and applications, while collaborating closely with Infineon experts to optimize your designs. If you're passionate about pushing the boundaries of digital design in a dynamic cross-functional team, we want to hear from you.
Welcome to the forefront of automotive innovation at Infineon's Automotive Microcontroller (ATV MC) division. In this role, you will be at the heart of shaping the future of mobility by owning the entire lifecycle of digital design IPs for automotive microcontroller communication interfaces. Your work will directly contribute to supporting the industry's megatrends, including electromobility, automated driving, connectivity, and advanced security.
In your new role you will:
- Own IP over the full product lifecycle, from initial concept through to release into volume production
- Be responsible for planning and implementing digital design IPs for automotive microcontroller communication interfaces
- Derive design micro-architecture from architectural specification and requirements
- Work as part of a cross-functional teams within your Business Unit to finetune the design and lead to efficient verification and implementation cycles
- Generate complex Digital IP designs, working alone or as part of a larger design team
- Perform design quality checks by synthesis, structural checks (e.g. lint, CDC, RDC), design for testability, power analysis, etc.
- Own and create design related documentation to comply with relevant standards for safety (ISO 26262) and security (ISO 21434)
You are best equipped for this task if you have:
- A degree in Electrical Engineering, Computer Science, Physics or related technical field
- At least 6 years of relevant working experience in area and power-efficient RTL design (Verilog or VHDL) with a natural understanding how RTL will map to gate-level structures
- Proven ability to work in a team of designers to undertake a larger design project
- Working experience in international and cross-functional technical teams within a multi-cultural environment
- Knowledge in communication protocols like Ethernet, PCIe, CAN, SPI, SENT or memory-like interfaces like SDMMC, xSPI, UFS or LP-DDR – would be an advantage
- Basic Knowledge about Safety and Security standards and applications (e.g. ISO 26262 and ISO21434, respectively) – would be an advantage
- Fluent English language skills