Staff Engineer Digital Verification (f/m/div)
Are you a passionate engineer who wants to join an energetic verification team using leading-edge tools and methodologies? Do you want to be part of the #1 semiconductor partner in the fast-changing world of automotive? Then, you just have to apply to have the chance of becoming a Staff Engineer for Digital Verification at Infineon’s Design Center in Padova, Italy.
As a Staff Engineer for Digital Verification, you will be responsible for a wide variety of advanced verification tasks, while working in close cooperation with other teams.
In your new role you will:
- Work with Design Engineers in the verification and validation of circuit designs;
- Develop design standards and guidelines to ensure quality and performance;
- Perform electrical verification of circuit components;
- Perform failure analysis and suggest corrective actions;
- Work with Management to coordinate and execute projects within the timeline and budget;
- Determine technology requirements, dependencies, and deliverables based on project specifications;
- Utilize state-of-art techniques, tools, and technologies for design verification activities;
- Prepare the design verification plan based on design specifications;
- Maintain the design verification environment while tracking and closing bugs.
You are best equipped for this task if you have:
- A degree in Electronic/ Electrical Engineering or equivalent degree with specific knowledge of microelectronic devices and related digital circuit design;
- At least 3 years of experience as a Verification Engineer preferably within the semiconductor industry;
- Very good digital verification background using standard methodologies such as UVM,
- including test planning, testbench development, running regressions, and coverage closure;
- Solid experience with hardware description and verification languages, such as SystemVerilog and VHDL;
- Very good knowledge of simulation tools and debugging techniques;
- Good knowledge of Unix OS and scripting languages, such as Python, TCL, and Perl;
- Fluency in English (mandatory).
It is an advantage if you have:
- Experience in digital design implemented on sub-micron technologies;
- Experience in Power-aware verification using UPF/CPF;
- Experience in simulating mixed-signal designs and behavioral modeling of analog circuits;
- Experience with SystemVerilog Assertions (SVA) and formal verification;
- Solid knowledge of Cadence, Synopsys, or Mentor Graphics tools such as Xcelium/NCSim, vManager, Questa/ModelSim, and VCS;
- Experience with requirements-driven verification and automotive standards (in particular ISO26262);
- Knowledge of analog & mixed-signal IC architectures and integration requirements;
- Familiarity with Power Management ICs (PMICs) for automotive;
- Knowledge of Requirements Management methodologies;
- Knowledge of Jama and Jira.