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You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology. In this position, you will be responsible for Full Chip Layout convergence of complex core IP. Your responsibilities will include but not limited to:
1. Responsible for Full Chip layout convergence along with FloorPlan, PDN, RV/EM
2. Interacting with RTL team on expected RTL models and passing on changes into design thro top-down collaterals for partition execution
3. Providing fullchip layout solutions to high speed design – like structural routing push down, pinning, detour checkers
4. Deep Understanding of utilization and push for area reduction technique
5. Closely work with SD/PD, Integration, sign off and timing teams
You must possess a Masters Degree in Electrical or Electronics Engineering with at least 7 or more years of experience in related field or a Bachelor's Degree with at least 9 years of experience. Technical Expertise in Static Timing Analysis is preferred. Preferred additional skills : - Experience of handle complex core design, high-speed designs - Basic understanding of timing analysis
- Hands on experience in sign off flows – RV/PDN, VCLP, FEV
- TFM knowledge of APR tools (either/or both Cadence/Synopsys)
- Ability to handle new feature feasibility studies - SD flow knowledge would be plus - Familiarity with Verilog/VHDL - Tcl, Perl, Python scripting - Strong verbal and written communication skills
Inside this Business Group
The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.