CPU-SoC Silicon Design Engineering Part-Time Intern
Validate Register Transfer Level (RTL) model functionality for next-generation embedded circuit solutions, utilizing CAD tools for logic simulation and circuit performance evaluation.
Define and implement VLSI structural design methodology, including tasks such as synthesis, floor planning, power-grid and clock tree designs, timing closure, and place-and-route.
Develop Analog IP on deep submicron processes, focusing on tasks like high-speed clocking circuit design, high-voltage I/O, and layout design for Intel's SOC.
Integrate third-party IPs into the system, ensuring functional and timing convergence, as well as handling signals crossing power planes and clock domains.
Validate and integrate third-party IPs, working closely with design teams to implement low-level RTL design and develop test environments for SOC validation.
Oversee SoC development, including architecture design, logic design, system simulation, and multidimensional layout of complex integrated circuits, contributing to the entire SoC design flow.
You must possess the below minimum qualifications to be initially considered for this position:
Students pursuing a Bachelor degree in Electrical and Electronics Enginering, Electrical Engineering, Electronics Engineering, Microelectronic Engineering, Mechatronic Engineering, Computer Engineering or related major with good CGPA
Good communication skills and proficient in English
Knowledge on Unix, VLSI Design, SOC/PC Architecture, System Verilog is major plus.
This part-time internship is tailored for undergraduate students from the second year onward, and it might not be a part of the university curriculum requirement.
Students will perform internship part-time, dedicating a minimum number of hours per week in a real industry environment while pursuing their degrees at identified universities.
Duration: Minimum 1-year contract