DFX Design Engineer

Intel

Posted Feb. 12, 2024

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Job Description


CEG HIP MYS organization is holding the charter to develop end-to-end DDR IP and software development as a path to enable new markets and organizational capabilities leveraging world class IPs and highly talented end-to-end firmware and silicon testing capabilities. CEG HIP MYS will collaborate closely with SOC and customer organizations to develop the platforms.
With this opportunity, you will have opportunity to expand your exposure in industry SoC development, IP leadership PHYs, industry soft IPs, SoC and IP subsystems implementation and testing.

Key Responsibility include :


Qualifications


Candidate must possess strong fundamentals on the following area.


Other Locations



MY, Kulim


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.