IFS, Design For Test (DFT) Engineer
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Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation.
As a DFT Engineer in IFS you will:
- Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.
- Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence.
- Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
- Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
- Follows secure development practices to address the security threat model and security objects within the design. Works with IP providers to integrate and validate IPs at the SoC level.
- Drives quality assurance compliance for smooth IPSoC handoff.
The chosen candidate will also have the following skills in addition to the qualifications listed below:
- Willingness to present information and influence technical groups (SP)
- Excellent communication skills
What we need to see (Minimum Qualifications):
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Math.
- 3+ months experience with Design for Test Solutions gained from internship or coursework.
How to Stand out (Preferred Qualifications):
- Post graduate degree Electrical Engineering, Computer Engineering Computer Science, or in a related field
- 2+ Years experience with Tessent DFT solutions (e.g., Scan, TestKompress, Memory BIST/BISR, Logic BIST, iJTAG etc.)
- 2+ Years experience in optimizing tools/flows/methods for DFT insertion and validation.
- 2+ Years experience with the SoC development process (e.g. synthesis, static timing analysis, formal equivalence checking, etc.)
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits