IFS, Physical Design Methodology Engineer
Job DescriptionConceptualizes, documents, and designs tools, flows, and methods (TFM) for use in the physical design implementation of IPs, SoCs, and the interaction/handoff/reuse between IPs and SoCs. Establishes regression flows, drives improvement in RTL to GDS flows, and creates and implements methodologies for improving robustness, power, performance, area, and timing for optimizing physical design constraints. Develops new physical design techniques through innovative scripts, checkers, flows, and other CADbased automation to simplify and expedite the design process. Analyzes retrospective data on current generation quality and efficiency gaps to identify proper incremental, evolutionary, or transformative changes to the existing physical design related TFM. Partners with physical design, circuits, CAD, RTL, tool/flow owners, and thirdparty vendor teams to continuously improve physical design methodologies and efficiencies.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates
Bachelor or Master of Science degree in Electrical Engineering or Computer Engineering
4+ years of relevant experience in physical design and/or TFM development
Possesses overall experience in structural and physical design
Scripting skills using a programming language such as Perl, TCL, or Python
Expertise of industry standard placement and routing, signoff CAD tools such as Cadence, Synopsys, Ansys, etc.
Preferred and Additional Qualifications:
Knowledge in System Verilog, Verilog, SoC design integration, design verification flow and methodology
Analytical with good interpersonal skills
Excellent team player
Strong analytical ability, problem solving and communication skills.
Willingness to work independently and at various levels of abstraction.