Logic Design Engineer

Intel

Posted Feb. 12, 2024

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Job Description


Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!

Life at Intel

Diversity at Intel

As a Logic Design Engineer:

You should be able to independently work and develop various logic design, uarchitecture and development activities including micro-architecture, RTL code from high level specs, ensure end to end design quality in terms of Lint/CDC/DFT/Synthesis/STA/Formal Equivalence etc.
You would be expected to develop micro-arch of the block/IP you own and also participates in the various Architecture and Microarchitecture specifications forums the Logic components.
Provides IP integration support to SoC customers and represents RTL/logic design team.
Be the design owner, and review and drive test plan, assertions and overall quality of the block/IP.

You should be able to interact with various stake holders (internal as well as external) to drive end 2 end quality, design objectives within stipulated schedule timelines.
Must have the ability to clearly express technical concepts in verbal and written form
Innovative thinker, problem solving, good communication skills, self-discipline and results orientation are critical soft skills needed.
Good hands-on knowledge on industry standard EDA tools and HDLs
You must be an extremely good team player and should be able to work across organization boundaries and domains.


Qualifications


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications: must haves

Candidate must possess a Bachelor/master's degree in electronics/electrical/or any STEM related degree

Experience in the range of 8 plus years in defining specifications/architecture and execution of RTL/Logic design of memory IOs.

5+ years of silicon development cycle from concept to PRQ including:

DFT/DFD/Post Silicon debug support,

HW/SW partitioning

Working experience on Memory interfaces(DDR, LPDDR, GDDR, HBM)

Expertise with Verilog, system Verilog, C, C++, Perl languages

Preferred Qualifications:

Expertise with Verilog, system Verilog, C, C++, Perl languages.

Ability to clearly express technical concepts in verbal and written form

Knowledge in industry FE/RTL tools and design methodologies

Hands on prior experience of developing and working similar high speed memory IOs with multiple clock domain, power plan designs.

Familiarity with overall silicon development cycle from concept to PRQ including DFT/DFD/Post Silicon debug support, HW/SW partitioning is desired.


Inside this Business Group


The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Other Locations



US, OR, Hillsboro; US, CA, Santa Clara


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in US, California: $144,501.00-$217,311.00
*Salary range dependent on a number of factors including location and experience


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.