Logic Design Methodology Engineer - Graduate Intern
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Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Who We Are
Join our Central EDA PESG Static Checks team for an exciting opportunity to work on different static checks.
Who You Are
Responsibilities may be quite diverse in a technical nature and will vary significantly depending on the unique needs of the role, U.S. experience and education requirements.
As a Logic Design Methodology Engineer Graduate Intern, you would:
Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.
In this role responsibilities include although not limited to:
- Develops and tests Engineering Design Automation tools
- Creates flows and scripts to analyze and test design methodologies
- Evaluates vendor practical capabilities to provide required products or services
- Responsible for designing deploying and testing efficiency of tools to utilize in achieving design goals and collaborating with design teams on methodology development
- Design Automation Engineers are advocates of applying design methodologies to help execute projects effectively and successfully with high quality
Note: This internship is for Spring/Summer 2024 Start
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
The candidate must be pursuing Master's degree -OR- PhD in Electrical Engineering, Computer Science, Computer Engineering or related field and have 3+ months experience in the following:
- Scripting (Perl, TCL, or Python)
- RTL, Verilog
- Unix/Linux environment
- Synopsys/Cadence/Siemens design tools
- System Verilog
- Software validation, regression
- RTL/Logic design CAD tool
- Logic Design, RTL Simulation, RTL Static Checks, Clock Domain Crossing, Low Power Design, UPF
NOTE: Minimum length of internship is 3 months Preferred length of internship is 6 to 9 months.
Inside this Business GroupIn the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Other LocationsUS, OR, Hillsboro; US, AZ, Phoenix; US, MA, Hudson
Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Annual Salary Range for jobs which could be performed in US, California: $63,000.00-$166,000.00
*Salary range dependent on a number of factors including location and experience