Pre Silicon Verification Engineer
Who Are we?
VTG is developing cutting-edge Imaging solutions from the IP level into full SOC solutions, based on computer vision, and AI that will serve various corresponding markets as well as enrich vision use cases and future user experiences for the Imaging world.
What will you do?
We're looking for an experienced verification engineer to join our system verification team, which is responsible for developing a pre-Silicon functional verification Environment, develop tests, to verify that the system will meet design requirements. At our system-level environment, we are developing and reusing dedicated verification environments and tools, while driving a complex process of exercising and debugging the design to verify its logical correctness. These environments are developed using unique, state-of-the-art languages and tools, and advanced software engineering methodologies. Various validation techniques are used, such as simulation and digital verification, while offering a unique Hardware-Software experience. In addition to various tools, languages, and validation methodologies, engineers will develop expertise with Intel Architecture and Micro Architecture and will be deeply involved in the process of defining new Intel features.
What Are We Looking for?
- BSC or MSC degree in Electrical Engineering, Computer Engineering, Software Engineering, or Computer Science.
- At least 6 years of experience in the development of SOC verification environments
- Knowledge in VLSI design and/or verification
- Experience in working with Verilog and System Verilog (UVM - a major advantage)
- Familiarity with CPU architecture/assembly, Tensilica preferable - major advantage
- Experience coding in: C\Python\Perl - advantage.