Product Development Engineer

Intel

Posted Feb. 12, 2024

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Job Description


Job Description: Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Make significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies and re-designs circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment. Responsibilities In this position, you will be responsible for server product test development. Your responsibilities will include but not be limited to - Having close partnership with design and product development engineers to deliver Design-for-Test solutions - Participating in DFT development like DFT architecture definition and test plans definition - Responsible for Verilog and/or VHDL test bench creation and/or debug, test writing, Register Transfer Level simulation, Gate Level Simulation, analog simulation, performance validation, VTPSim, silicon debug on tester or on other platform like system level - Developing highly optimized test vectors by using state-of-the-art vector conversion tool and methods - Developing, integrating and optimizing test program through characterization and other techniques - Developing or designing test hardware, for example test interface unit - Managing silicon debug to check out all the structural and functional tests - Qualifying new products and performing detailed test program analysis to ensure product startup with low Defect per Million, low test time, good yield and meeting other product health indicators before passing over to factory product engineering group for high volume manufacturing.

Qualifications


Qualifications: Bachelor's deg in Electronics, Electrical, Microelectronics or Computer Engineering with 3.40 CGPA. Knowledge in C++, Perl, VHDL, Verilog, digital logic, CMOS and hardware design is preferred. You should also have good communication and leadership skills. Chipset integrated circuit testing and high volume manufacturing experience would be an added advantage. Experience of full ownership and work independently on 1 full product cycle is a must.

Inside this Business Group


Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.