SoC Design Engineer: ISCP SOC Front-End Design Team
Be a part of IP Security Client Product Group, SoC Front End Design team designing and developing the next generation SoCs for Intel. This position is a highly visible role performing Front End related activities ranging from IP integration to verification using state of the art tools and methodology at SOC level. Successful candidate will work across teams including Fullchip, IP Design, Firmware, Structural Design, DFX, emulation, and validation, will gain exposure on platform architecture, design, and features, and will participate in debug at various level of the hierarchy. Good communication and leadership skills are required.
Specific responsibilities include but not limited to:
- Involving in microarchitecture/RTL logic/testbench/verification environment design (in System Verilog, Verilog or other Hardware description language) and integration
- Involving in capabilities building within and outside the SoC Front End team
- Validating the functionality of new architectural features of next generation designs by developing testplans, tests content, coverage points or test tools.
- Interfaces and protocols to learn include but not limited to Fabric, Infrastructure, Platform Essentials and multiple flavors of IO within the SoC.
Candidate should have either i) Bachelor degree in Electrical, Electronics or Computer Engineering or relevant field with at least 5-6 years of experience in Front End development or related areas; or ii) Masters degree in relevant field.
Exposure/experience in computer architecture, System Verilog, SOC-level design integration and or validation, simulation based debug, engineering tools, flows and methodologies is preferred.
Possesses strong analytical and debug skills.
Ability to communicate well with counterparts and key stakeholders including cross site partners.