SoC Design Engineer
We are seeking a System On a Chip Design Engineer to join our dynamic team. The successful candidate will be responsible for the integration and verification of an SoC design, integrating logic of IP blocks and subsystems into a full chip SoC or discrete component design. This role is integral to defining architecture and microarchitecture features of the block being designed and ensuring the quality of various logic design aspects.
Participate in the definition of architecture and microarchitecture features of the block being designed.
Perform quality checks in various logic design aspects ranging from RTL to timing/power convergence.
Apply various strategies, tools, and methods to optimize logic to qualify the design to meet power, performance, area, and timing goals.
Create and review the verification plan and its implementation to ensure design features are verified correctly.
Execute and debug comprehensive SoC simulation. Resolve and implement corrective measures for failing RTL tests to ensure correctness of features.
Follow secure development practices to address the security threat model and security objects within the design.
Work with Intellectual Property providers to integrate and validate IPs at the SoC level.
Drive quality assurance compliance for smooth IP to SoC handoff.
You must possess the minimum qualifications below to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Bachelor degree in Electronic, Electrical, Mechatronic engineer, computer science, or related field of study with at least 1 year of experience in:
- Programming skills in Python or equivalent languages(packages, classes, methods and properties).
- VLSI Logic design or verification
- Major EDA tools (e.g., Synopsys VCS/Fusion Compiler/Spyglass, Cadence - Conformal/Xcelium, Siemens Mentor Graphics Tessent, etc.)
- Unix/Linux and Windows operating systems
- Intermediate English Level
- Costa Rican unrestricted work permit.
Knowledge in any of the next areas is a plus:
System Verilog / OOP, OVM/UVM.
SOC-level design/integration and/or validation.
RTL quality checks.
Simulation-based debug (VCS, Verdi, DVE).
Computer (CPU) and/or System (Platform) Architecture.
Object Oriented programming.
Front-end Design TFMs (Tools, Flows, and Methodologies).