Design Verification Engineer - Interconnect
*Remote working opportunity available from Raleigh, NC*
About Arm System IP
Arm System IP enables designers to build Arm AMBA systems that are high performance, power efficient and reliable. Configurable for many different applications, System IP is the right choice for your system whether it is a high-efficiency IoT endpoint or a high-performance server SoC. The collection of silicon proven interconnects, security IP, system controllers, debug and trace and IP tooling are all designed, validated and optimized to be used with Arm Cortex processors and Arm Mali Multimedia IP. Built upon the open AMBA interface standard, Arm System IP provides design teams with the foundation for building better systems.
What will I be accountable for
As a Design Verification Engineer, you would be delivering verification of one or more functional blocks at the unit or top level. Typical accountabilities include:
- Develop SystemVerilog/UVM testbenches for unit/top level.
- Build and maintain detailed verification plans.
- Generate and run test cases on logic simulation models.
- Debug functional errors in the RTL model using simulation and debug tools with an in-depth understanding of the microarchitecture.
- Define and implement functional coverage.
- Analysis of data from simulation runs using machine learning and data science techniques to drive efficient bug discovery and debug.
- Promote and demonstrate the Arm Core Beliefs and Behaviors.
What skills, experience and qualifications do I need?
- Bachelor’s or Master’s degree in Computer Science or Electrical/Computer Engineering.
- Proven experience in pre-silicon verification/RTL design.
- Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g. AMBA5 CHI, AMBA4 ACE or AXI).
- Previous experience in specification, creation, and debug of System Verilog/UVM constrained-random testbenches.
- Shown software engineering skills including understanding of object-oriented programming, data structures, and algorithms.
- Experience with functional coverage verification methods.
- Excellent professional knowledge of scripting languages such as Python or Perl
- Experience in Formal Verification testbenches is a plus.
What to Expect Long Term?
- Become well-versed in design hardware with a focus on safety and reliability!
- In most digital logic design roles, circuits are assumed to work. When we type 1+1 into a calculator, we expect the result should always be 2. But in real life, circuits sometimes fail! Alpha particles from radioactive decay of trace elements, cosmic rays resulting in high energy neutrons, and electro-migration - the erosion of metal wires due to high currents -can all cause a circuit to produce the wrong result.
- Develop into a leading Functional Safety Engineer where you will be analyze our IP to understand how likely such silicon faults are, and what affects such failures could have for the users of our IP. In addition, you will help develop safety mechanisms to detect or even resolve such faults.
- This role will become a balances of reasonable level of both independent work while at the same time building consensus among everyone from project leaders, engineering, and marketing. It provides an opportunity to learn about all parts of chip design, and to become an expert in making chips safer and more reliable.