SMTS Silicon Design Engineer

Advanced Micro Devices Inc

Hyderabad, UNAVAILABLE, India

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance_

SMTS SILICON DESIGN ENGINEER

THE ROLE:

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases.
Estimate the time required to write the new feature tests and any required changes to the test environment.
Build the directed and random verification tests.
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues. 
Post silicon support to ensure successful bring up and enhance yield learning.

PREFERRED EXPERIENCE:

Understanding product specifications and deriving the TB architectures.
Developing verification plan, test plan, coverage plan, assertions. etc
Developing block level and multi block level verification environments & reusable verification components based on SV/UVM methodology.
Coverage metrics to ensure conformity, running regressions, debug test failures and regression management.
Knowledge and working experience with any of the complex protocols like DDR/Video Encoder, Decoders , ISP/Cryptography/Others – an advantage.
Expertise in Scripting languages like Perl/Python
Knowledge in AMBA AXI, APB..etc - an advantage
Ability to work collaboratively with other engineers and have good ownership and leadership skills.
Assisting validation teams with on board-level test issues, educating design teams on verification methodology.
Contributing to process improvement in verification methodologies that impact the productivity
Strong oral and written communication skills, problem solving and analytical skills

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering with 8-12 years of experience in IP/SoC/ASIC Verification

#LI-SR5

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described: AMD benefits at a glance.

SMTS SILICON DESIGN ENGINEER

THE ROLE:

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases.
Estimate the time required to write the new feature tests and any required changes to the test environment.
Build the directed and random verification tests.
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues. 
Post silicon support to ensure successful bring up and enhance yield learning.

PREFERRED EXPERIENCE:

Understanding product specifications and deriving the TB architectures.
Developing verification plan, test plan, coverage plan, assertions. etc
Developing block level and multi block level verification environments & reusable verification components based on SV/UVM methodology.
Coverage metrics to ensure conformity, running regressions, debug test failures and regression management.
Knowledge and working experience with any of the complex protocols like DDR/Video Encoder, Decoders , ISP/Cryptography/Others – an advantage.
Expertise in Scripting languages like Perl/Python
Knowledge in AMBA AXI, APB..etc - an advantage
Ability to work collaboratively with other engineers and have good ownership and leadership skills.
Assisting validation teams with on board-level test issues, educating design teams on verification methodology.
Contributing to process improvement in verification methodologies that impact the productivity
Strong oral and written communication skills, problem solving and analytical skills

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering with 8-12 years of experience in IP/SoC/ASIC Verification

#LI-SR5