SoC Design Engineer - Graduate Intern
Austin, TX, USApply Now!
Join Intel's Networking Design Team creating SoC solutions with next generation technologies. As part of the Physical and Structured Design team you will work with an experienced team of engineers motivated to deliver innovative solutions to physical synthesis, floor planning, place and route, timing and power optimizations.
Networking Silicon Solutions team develops SoC designs to accelerate Networking applications and cloud computing. The team works with Register Transfer Level (RTL) designs to implement structural physical designs through synthesis, floor planning, power-grid, clock tree design, place and route, RC-extraction, timing budgeting and closure to achieve targeted Performance/Power/Area. As a member of the team, you will learn to help verify designs through comprehensive sign-off tools in functional equivalence (FEV), timing/performance (STA), noise, layout design rules (DRC), reliability (RV), and power.
Responsibilities include but may not be limited to:
- Full-chip electrical verification
- Converging timing
- Running a number of tools flows required to deliver high quality designs
An ideal candidates will have strong problem solving skills, and be a quick learner.
Length of internship estimate is 3 months with a possibility to extend.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.
- Candidate must be pursuing a Master's or Ph.D. degree in Electrical Engineering, Computer Engineering or related field
- Experience with Synopsys or Cadence physical design and signoff tools
- SoC Design experience
- Experience in ASIC physical design
- Knowledge of UPFs and power domain analysis
- Knowledge of Ethernet, ORAN, PCIe, JESD, and 5G are helpful