Summer 2023 Silicon Design Co-Op/ Intern
Advanced Micro Devices Inc
San Jose, California, United States
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WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.
AMD together we advance_
Summer 2023 Silicon Design Engineer Intern/Co-Op
JOB LOCATION:
San Jose, CA
WHAT KIND OF ROLE IS THIS:
HYBRID: This is a hybrid role (remote & in-office) – intern/co-op is required to work from the the San Jose Office about 3-4 days a week.
PROGRAM TERM:
- Summer or Fall term depending on candidate availability
- Summer: Start Date May or June – August or September 2023
- Fall: Start Date August or September – December 2023
WHAT YOU’LL BE DOING:
- You will be working in a dynamic environment with a senior team of IC designers.
- Your will leverage your knowledge gained through coursework and prior internship experience to provide a variety of support in areas of design, development and verification.
- Once you complete onboarding, you will undertake multiple training sessions to acclimate yourself with AMD’s design flows. You will also get familiar with design environment which would consist of RTL and Transistor based workflows.
- Your responsibilities will include but not limited to using various design tools to generate reports, post-processing them and reporting workflow issues along the way.
- In this exciting role, you will have opportunities to learn about top-down chip design methodologies using FPGA and ASIC tools. In addition, you will get exposure to understanding various aspects of advanced technology utilized to implement a successful chip for end customers.
KEY QUALIFICATIONS:
- Coursework, Knowledge and skills in several if not all the following areas:
- Basic understanding and concepts of IC design methods.
- RTL using Verilog and System Verilog
- Basic concepts of CMOS Transistors and operation.
- Understanding of FPGA based tools and methodologies
- Knowledge of MS-word, MS-excel, MS-PowerPoint, SharePoint, Confluence
- LINUX environment, Python/Perl based scripting
WHAT WOULD SET YOU APART:
- Ability to learn quickly and contribute within a fast-paced environment
- Self-starter and highly motivated
- Some prior internship experience in tech industry is a plus
WHO WE’RE LOOKING FOR:
Ideal candidate would have completed three years of coursework in BS - EE/CE or working on their Masters’ coursework in EE/CE with emphasis on VLSI/Digital/Systems design
BENEFITS:
- Benefits compensation range $32.00-$50.00 hourly commensurate with experience
- Healthcare coverage, dental and vision
- Paid holidays
- Relocation stipend
- Education assistance for required Co-op/Intern course
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Summer 2023 Silicon Design Engineer Intern/Co-Op
JOB LOCATION:
San Jose, CA
WHAT KIND OF ROLE IS THIS:
HYBRID: This is a hybrid role (remote & in-office) – intern/co-op is required to work from the the San Jose Office about 3-4 days a week.
PROGRAM TERM:
- Summer or Fall term depending on candidate availability
- Summer: Start Date May or June – August or September 2023
- Fall: Start Date August or September – December 2023
WHAT YOU’LL BE DOING:
- You will be working in a dynamic environment with a senior team of IC designers.
- Your will leverage your knowledge gained through coursework and prior internship experience to provide a variety of support in areas of design, development and verification.
- Once you complete onboarding, you will undertake multiple training sessions to acclimate yourself with AMD’s design flows. You will also get familiar with design environment which would consist of RTL and Transistor based workflows.
- Your responsibilities will include but not limited to using various design tools to generate reports, post-processing them and reporting workflow issues along the way.
- In this exciting role, you will have opportunities to learn about top-down chip design methodologies using FPGA and ASIC tools. In addition, you will get exposure to understanding various aspects of advanced technology utilized to implement a successful chip for end customers.
KEY QUALIFICATIONS:
- Coursework, Knowledge and skills in several if not all the following areas:
- Basic understanding and concepts of IC design methods.
- RTL using Verilog and System Verilog
- Basic concepts of CMOS Transistors and operation.
- Understanding of FPGA based tools and methodologies
- Knowledge of MS-word, MS-excel, MS-PowerPoint, SharePoint, Confluence
- LINUX environment, Python/Perl based scripting
WHAT WOULD SET YOU APART:
- Ability to learn quickly and contribute within a fast-paced environment
- Self-starter and highly motivated
- Some prior internship experience in tech industry is a plus
WHO WE’RE LOOKING FOR:
Ideal candidate would have completed three years of coursework in BS - EE/CE or working on their Masters’ coursework in EE/CE with emphasis on VLSI/Digital/Systems design
BENEFITS:
- Benefits compensation range $32.00-$50.00 hourly commensurate with experience
- Healthcare coverage, dental and vision
- Paid holidays
- Relocation stipend
- Education assistance for required Co-op/Intern course