Senior RTL Engineer
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
We are searching for a senior RTL engineer to join the design team, responsible for defining, specifying, modeling, and implementing RTL for current and future advanced mixed signal IPs powering AMD products.
Join a dynamic team and give a boost to your personal career in a challenging and fascinating ever-growing, never-boring area! Looking forward to welcoming you in the team!
THE PERSON:
The successful candidate will possess:
- Excellent analytical and critical thinking skills along with attention to details
- Must be an initiative-taker, able to drive tasks independently and efficiently to completion
- Strong/effective communication skills
- Enthusiastic team-first mentality
- Ability to provide mentorship and guidance to junior engineers
- Relevant academic background (M. degree preferred) and at least 5 years’ progressive experience
KEY RESPONSIBILITIES:
- Analyze complex digital design problems and propose solutions
- Develop Verilog RTL and Functional Behavioral Models
- Drive/develop ASIC design flows and scripts
- Create microarchitecture specifications
- Work with Design Verification team to ensure functional correctness
- Work with Physical Design team to ensure proper implementation of the design along with timing closure
- Deliver improvements, optimization and power saving enhancements
- Support silicon bring-up and diagnostics
PREFERRED EXPERIENCE:
- Proven experience in analog mixed signal design from specification to successful silicon
- Experience in high-speed interfaces such as DDR, GDDR, HBM, and/or high speed SERDES
- Experience in designs with multiple power domains
- Experience in designs with multiple clock domains
- Experience in industry standard ASIC CAD tools for simulation, synthesis, STA, CDC, UPF, power estimation, etc.
- Experience in advanced semiconductor technologies, preferably FinFET
- At least 5 years’ progressive experience in RTL Design
ACADEMIC CREDENTIALS:
- Relevant academic background (Master’s degree preferred)
#LI-RD1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE:
We are searching for a senior RTL engineer to join the design team, responsible for defining, specifying, modeling, and implementing RTL for current and future advanced mixed signal IPs powering AMD products.
Join a dynamic team and give a boost to your personal career in a challenging and fascinating ever-growing, never-boring area! Looking forward to welcoming you in the team!
THE PERSON:
The successful candidate will possess:
- Excellent analytical and critical thinking skills along with attention to details
- Must be an initiative-taker, able to drive tasks independently and efficiently to completion
- Strong/effective communication skills
- Enthusiastic team-first mentality
- Ability to provide mentorship and guidance to junior engineers
- Relevant academic background (M. degree preferred) and at least 5 years’ progressive experience
KEY RESPONSIBILITIES:
- Analyze complex digital design problems and propose solutions
- Develop Verilog RTL and Functional Behavioral Models
- Drive/develop ASIC design flows and scripts
- Create microarchitecture specifications
- Work with Design Verification team to ensure functional correctness
- Work with Physical Design team to ensure proper implementation of the design along with timing closure
- Deliver improvements, optimization and power saving enhancements
- Support silicon bring-up and diagnostics
PREFERRED EXPERIENCE:
- Proven experience in analog mixed signal design from specification to successful silicon
- Experience in high-speed interfaces such as DDR, GDDR, HBM, and/or high speed SERDES
- Experience in designs with multiple power domains
- Experience in designs with multiple clock domains
- Experience in industry standard ASIC CAD tools for simulation, synthesis, STA, CDC, UPF, power estimation, etc.
- Experience in advanced semiconductor technologies, preferably FinFET
- At least 5 years’ progressive experience in RTL Design
ACADEMIC CREDENTIALS:
- Relevant academic background (Master’s degree preferred)
#LI-RD1