today

Senior Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

17h

Engineer - BT/UWB validation and system integration

Qualcomm Bangalore, India

ASIC SOC

17h

NPU AI/Processor Synthesis Engineer- Sr Lead

Qualcomm Multiple locations

ASIC RTL

17h

yesterday

Senior Hardware Engineer - PCB Design

HPE Juniper Networks Bengaluru, Karnataka

FPGA Logic Design

1d

ASIC Verification Engineer

HPE Juniper Networks Bengaluru, Karnataka

SystemVerilog ASIC

1d

Senior Controls Engineer – Electro-mechanical Products

Blue Origin Longmont, Colorado

VHDL Verilog

1d

Engineering IP Program Manager, Sr. Principal

Marvell Multiple locations

ASIC Design for Test

1d

Lead STA Engineer

NXP Semiconductors Bangalore, India

ASIC RTL

1d

Design of integrated logic controller for MTP Memory

NXP Semiconductors Eindhoven, North Brabant

VHDL Verilog

1d

Director of SoC Implementation / Physical Design

NXP Semiconductors Austin, Texas

ASIC RTL

1d

Director - STA

NXP Semiconductors Austin, Texas

Verilog RTL

1d

Principal Physical Design Engineer / Physical Design – ACE US

NXP Semiconductors Austin, Texas

ASIC RTL

1d

Linux Software Engineer - System Manager

NXP Semiconductors Austin, Texas

VHDL HDL

1d

SoC Validation Engineer

NXP Semiconductors Austin, Texas

FPGA Digital Design

1d

Ethernet Switch ASIC Design Engineer

Qualcomm Shanghai, Shanghai

ASIC RTL

1d

Sr HardWare Program Manager

Qualcomm Bangalore, India

RTL Synthesis

1d

Validation Engineer - Staff

Qualcomm Tijuana, Baja California

VHDL Verilog

1d

AI TLM Performance Modeling

Qualcomm San Diego, California

RTL SOC

1d

Staff Verification Engineer, Compute Subsystems

Qualcomm Markham, Ontario

Verilog System Verilog

1d

Synthesis Engineer, Sr Lead

Qualcomm Bangalore, India

RTL Synthesis

1d

Physical Design Sr / Lead / Staff Engineer - Camera

Qualcomm Bangalore, India

STA Synthesis

1d

SoC Design and Integration Engineer

Qualcomm San Diego, California

FPGA ASIC

1d

SOC Design Verification Sr Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1d

SOC Design Verification Assoc Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1d

Design Verification - Senior Staff Engineer

Qualcomm Hyderabad, Telangana

Verilog System Verilog

1d

Hardware Verification Engineer - Cork, Ireland

Qualcomm Cork, Munster

VHDL Verilog

1d

Senior Hardware Verification Engineer - Cork, Ireland

Qualcomm Cork, Munster

SystemVerilog FPGA

1d

Staff Hardware Verification Enginer - Cork, Ireland

Qualcomm Cork, Munster

SystemVerilog FPGA

1d

Senior Staff Hardware Verification Engineer - Cork, Ireland

Qualcomm Cork, Munster

SystemVerilog FPGA

1d

Product & Test Engineer

Qualcomm San Diego, California

DFT Design for Test

1d

Staff Physical Design Engineer

Qualcomm Ho Chi Minh City, Hồ Chí Minh

ASIC RTL

1d

Senior FPGA Engineer - (RF/Comm Systems/Simulink - REMOTE)

Anduril Costa Mesa, California

VHDL Verilog

1d

Senior Digital Design Engineer

Cirrus Logic Edinburgh, Scotland

Verilog SystemVerilog

1d

Sr. Staff / Principal Physical Design Engineer

SK hynix memory solutions America Inc. San Jose, California

ASIC RTL

1d

Bluespec Design Engineer (Haskell)

MatX Mountain View, California

Remote FPGA ASIC

1d

Senior 5G MAC Software Engineer

E-Space Santa Clara, California

FPGA ASIC

1d

Sept. 25, 2026

Analog IC Layout Engineer

Broadcom Edinburgh, Scotland

ASIC Place and Route

2d

Hardware Engineer III - PCB Design

HPE Juniper Networks Bengaluru, Karnataka

FPGA Logic Design

2d

Sr Hardware Engineer _ PCB/System Design

HPE Juniper Networks Bengaluru, Karnataka

FPGA Logic Design

2d

VLSI Engineer II - 0T1192

HPE Juniper Networks Sunnyvale, California

FPGA Logic Design

2d

Design Verification Intern

Marvell Petah-Tikva; IL - Yokneam

Verilog SystemVerilog

2d

Physical design CAD engineer

Marvell Yokneam; Petah-Tikva

ASIC RTL

2d

Data Center Silicon Hardware Engineering Intern - BS - 2027 Co-Op

Marvell Multiple locations

Verilog SystemVerilog

2d

Digital IC Design Engineering Intern

Semtech Burlington, Vermont

VHDL Verilog

2d

Digital IC Design Engineering Intern

Semtech Ottawa, Ontario

VHDL Verilog

2d

Senior CPU Formal Verification Engineer

SiFive Multiple locations

VHDL Verilog

2d

Senior CPU Design Verification Engineer

SiFive Hyderabad, Telangana

Verilog SystemVerilog

2d

PMIC Systems and Validation Engineer, Senior

Qualcomm Bangalore, India

FPGA ASIC

2d

CPU Physical Design Engineer

Qualcomm Austin, Texas

Logic Design Synthesis

2d

Physical Design Engineer, Staff

Qualcomm Austin, Texas

ASIC RTL

2d