today

Graduate Talent (CPU-SoC Silicon Design)

Intel Multiple locations

RTL Register Transfer

16h

Graduate Talent (CPU-SoC Silicon Design)

Intel Multiple locations

RTL Register Transfer

16h

Graduate Talent (CPU-SoC Silicon Design)

Intel Multiple locations

RTL Register Transfer

16h

Graduate Talent (CPU-SoC Silicon Design)

Intel Multiple locations

RTL Register Transfer

16h

Graduate Talent (CPU-SoC Silicon Design)

Intel Multiple locations

RTL Register Transfer

16h

Principal Engineer - HIG HBM - PE Design Validation

Micron Singapore, Central Singapore

VHDL Verilog

16h

Senior Engineer - HIG HBM - PE Design Validation

Micron Singapore, Central Singapore

VHDL Verilog

16h

yesterday

Digital Hardware Engineer

BAE Systems Totowa, New Jersey

FPGA Digital Design

1d

Senior CAD Engineer - Layout/Verification/Simulation

Micron Multiple locations

RTL Verification

1d

Staff Engineer - ASIC Layout

Micron Bengaluru, Karnataka

1d

STAFF ENGINEER, ASIC LAYOUT

Micron Bengaluru, Karnataka

1d

Deep Learning Compiler Verification Engineer

NVIDIA Multiple locations

Verification

1d

CPU STA CAD & Methodology Engineer (Staff/Sr Staff)

Qualcomm Bangalore, India

FPGA STA

1d

FPGA Engineer

Anduril Multiple locations

VHDL SystemVerilog

1d

Oct. 31, 2026

ASIC Design - Floorplan Engineer

Broadcom Fort Collins, Colorado

ASIC RTL

2d

ASIC Design Automation Engineer

Broadcom Fort Collins, Colorado

Verilog ASIC

2d

ASIC Design Engineer

Broadcom Fort Collins, Colorado

ASIC RTL

2d

IC Design Engineer (STA/ Synthesis)

Broadcom Multiple locations

ASIC RTL

2d

Physical Design Engineer

Broadcom Multiple locations

ASIC STA

2d

Principal Physical Design Engineer

Broadcom San Jose, California

ASIC STA

2d

Physical Design Engineer

Broadcom San Jose, California

ASIC Logic Design

2d

Physical Design Engineer

Broadcom San Jose, California

ASIC Logic Design

2d

Principal Physical Design Engineer, STA

Broadcom San Jose, California

ASIC RTL

2d

Principal Firmware Engineer – Digital ASIC

Blue Origin Cupertino, California

FPGA ASIC

2d

Solar Array Responsible Engineer, Project Sunrise Orbital Data Centers

Blue Origin Denver, Colorado

FPGA ASIC

2d

Senior Lead Firmware Engineer

NXP Semiconductors Multiple locations

RTL SOC

2d

Senior Staff Engineer, Physical Design

Marvell Singapore, Central Singapore

VHDL Verilog

2d

Sr. Staff Engineer, Physical Design

Marvell Da Nang, Đà Nẵng

Verilog ASIC

2d

Senior Staff Engineer - Design Verification Power Management

SiFive Bengaluru, Karnataka

RTL UVM

2d

Staff Engineer: Verification of Power Management

SiFive Bengaluru, Karnataka

RTL UVM

2d

CPU DV Senior Staff Engineer

SiFive Hyderabad, Telangana

Verilog System Verilog

2d

Senior Engineer - Hardware Engineering - DV

SiFive Ahmedabad, Gujarat

Verilog System Verilog

2d

Staff Engineer

SiFive Bengaluru, Karnataka

Verilog System Verilog

2d

Staff Verification Engineer - Security Blocks

SiFive Bengaluru, Karnataka

Verilog SystemVerilog

2d

Sr. Staff Engineer - Design Formal Verification

SiFive Multiple locations

VHDL Verilog

2d

Staff CPU Design Verification Engineer

SiFive Hyderabad, Telangana

Verilog System Verilog

2d

SVE content integration & SKU functional validation engineer

Qualcomm Bangalore, India

FPGA ASIC

2d

ASIC Verification Principal Engineer

Qualcomm Shanghai, Shanghai

Verilog System Verilog

2d

FY27 Intern - Camera HW ASIC Verification Intern - Canada (12 or 16 months)

Qualcomm Vancouver, British Columbia

Verilog System Verilog

2d

HW Board Designer - Haifa

Qualcomm Haifa, Haifa District

ASIC SOC

2d

Pre/Post Silicon Validation Engineer with PMIC Expertise

Qualcomm Bangalore, India

FPGA ASIC

2d

DFT Engineering Director

Qualcomm San Diego, California

ASIC DFT

2d

Video Design Verification Sr Engineer

Qualcomm Bangalore, India

Verilog System Verilog

2d

Principal Analog Design Engineer

Micron Boise, Idaho

Verilog IP Design

2d

Senior CAD Engineer – Physical Verification

Micron Multiple locations

Verification

2d

Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes

NVIDIA Santa Clara, California

2d

Senior System Verification Engineer

NVIDIA Santa Clara, California

2d

Senior Performance Verification Engineer

NVIDIA Santa Clara, California

2d

ASIC Design Verification Engineer - New College Grad 2026

NVIDIA Austin, Texas

2d

Senior Digital Design Verification Engineer - Hardware

NVIDIA Santa Clara, California

2d