today

Senior ASIC Design Verification Engineer - Slingshot

HPE Juniper Networks Bloomington, Minnesota

SystemVerilog FPGA

17h

ASIC Verification Engineer

HPE Juniper Networks Durham, North Carolina

SystemVerilog ASIC

17h

Senior Digital Design Engineer - MCU

NXP Semiconductors Catania, Sicily

Verilog SystemVerilog

18h

Principal SoC Program Manager - MCU

NXP Semiconductors Catania, Sicily

SOC

18h

FPGA and Emulation Prototyping Engineer - MCU

NXP Semiconductors Catania, Sicily

Verilog System Verilog

18h

Senior Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

RTL Verification

18h

Mixed Signal Design Verification Engineer

Allegro MicroSystems Manchester, New Hampshire

Verilog SystemVerilog

18h

Mixed Signal Design Verification Engineer

Allegro MicroSystems Prague, Praha, Hlavní město

Verilog SystemVerilog

18h

Mixed Signal Design Verification Engineer

Allegro MicroSystems Buenos Aires, Buenos Aires

Verification

18h

FPGA Firmware Engineer, Senior

Qualcomm San Diego, California

Verilog System Verilog

18h

Analog / Mixed-Signal Sensor IP Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

Verilog ASIC

18h

Analog / Mixed-Signal SerDes Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

Verilog ASIC

18h

Senior Test and Verification Engineer

Philips Shenzhen

Verification

19h

yesterday

DSP Systems Engineer, Staff

Qualcomm Toronto, Ontario

RTL Digital Design

1d

Cross-Functional Engineer, Staff

Qualcomm Multiple locations

VHDL Verilog

1d

Sept. 19, 2026

Digital Hardware Engineer

BAE Systems Nashua, New Hampshire

FPGA Digital Design

2d

Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification)

SiFive Bengaluru, Karnataka

SystemVerilog ASIC

2d

Director, Digital Design

Analog Devices Bangalore, India

FPGA ASIC

2d

Staff Engineer – DFT Engineering

Analog Devices Multiple locations

ASIC RTL

2d

Senior Manager, Layout

Analog Devices Limerick, Ireland

RTL DFT

2d

SoC Design Manager / Product Lead

Analog Devices Vancouver, British Columbia

ASIC RTL

2d

Principal Digital Design Engineer

NXP Semiconductors Chandler (Office)

Verilog SystemVerilog

2d

Senior Chip Design Engineer

NVIDIA Beer Sheva, Israel

VHDL Verilog

2d

Principal Digital Engineer or Sr. Principal Digital Engineer

Northrop Grumman Multiple locations

VHDL FPGA

2d

Engineer ASIC

Northrop Grumman Manhattan Beach, California

VHDL Verilog

2d

FPGA Design Senior Engineer

BAE Systems Nashua, New Hampshire

VHDL Verilog

2d

FY27 Intern - Analog Design Internship - Canada (12 or 16 months)

Qualcomm Toronto, Ontario

Verilog SystemVerilog

2d

CPU Physical Design Engineer, San Diego

Qualcomm San Diego, California

Logic Design Synthesis

2d

#Digital Hardware Engineer

Qualcomm Multiple locations

VHDL Verilog

2d

Senior Lead Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

2d

Senior Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

2d

Senior DFT Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

2d

High Performance DSP core Implementation(Synthesis) Senior Staff Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

2d

High Performance DSP core Implementation(Synthesis) Senior Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

2d

DFT Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

2d

DFT Staff Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

2d

Senior Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

2d

High Performance DSP core Implementation(Synthesis) Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

2d

Staff Engineer- Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

2d

High Performance DSP core Implementation(Synthesis) Staff Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

2d

High Performance DSP core Implementation(Synthesis) Senior Lead Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

2d

Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

2d

Functional Verification Engineer, Senior - Athens or Patra, Greece

Qualcomm Maroúsi, Attica Region

VHDL Verilog

2d

Design Implementation Engineer, Sr Lead

Qualcomm Bangalore, India

FPGA Synthesis

2d

SOC RTL Design Engineer - Staff

Qualcomm Hyderabad, Telangana

FPGA ASIC

2d

SoC Physical Design Engineer (Senior/Lead)

Qualcomm Bangalore, India

FPGA ASIC

2d

SOC Design Verification Engineer

Qualcomm San Diego, California

Verilog System Verilog

2d

FY27 Intern - MSIP Digital Design Verification Engineering Internship - Canada (16 months)

Qualcomm Toronto, Ontario

VHDL Verilog

2d

FY27 Intern - MSIP Digital Design Engineering Internship - Canada (16 months)

Qualcomm Toronto, Ontario

Verilog System Verilog

2d

Staff Mixed-Signal Digital Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

2d