today

DSP Systems Engineer, Staff

Qualcomm Toronto, Ontario

RTL Digital Design

4h

Cross-Functional Engineer, Staff

Qualcomm Multiple locations

VHDL Verilog

4h

yesterday

Digital Hardware Engineer

BAE Systems Nashua, New Hampshire

FPGA Digital Design

1d

Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification)

SiFive Bengaluru, Karnataka

SystemVerilog ASIC

1d

Director, Digital Design

Analog Devices Bangalore, India

FPGA ASIC

1d

Staff Engineer – DFT Engineering

Analog Devices Multiple locations

ASIC RTL

1d

Senior Manager, Layout

Analog Devices Limerick, Ireland

RTL DFT

1d

SoC Design Manager / Product Lead

Analog Devices Vancouver, British Columbia

ASIC RTL

1d

Principal Digital Design Engineer

NXP Semiconductors Chandler (Office)

Verilog SystemVerilog

1d

Senior Chip Design Engineer

NVIDIA Beer Sheva, Israel

VHDL Verilog

1d

Principal Digital Engineer or Sr. Principal Digital Engineer

Northrop Grumman Multiple locations

VHDL FPGA

1d

Engineer ASIC

Northrop Grumman Manhattan Beach, California

VHDL Verilog

1d

FPGA Design Senior Engineer

BAE Systems Nashua, New Hampshire

VHDL Verilog

1d

FY27 Intern - Analog Design Internship - Canada (12 or 16 months)

Qualcomm Toronto, Ontario

Verilog SystemVerilog

1d

CPU Physical Design Engineer, San Diego

Qualcomm San Diego, California

Logic Design Synthesis

1d

#Digital Hardware Engineer

Qualcomm Multiple locations

VHDL Verilog

1d

Senior Lead Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

1d

Senior Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

1d

Senior DFT Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

1d

High Performance DSP core Implementation(Synthesis) Senior Staff Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

1d

High Performance DSP core Implementation(Synthesis) Senior Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

1d

DFT Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

1d

DFT Staff Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

1d

Senior Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

1d

High Performance DSP core Implementation(Synthesis) Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

1d

Staff Engineer- Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

1d

High Performance DSP core Implementation(Synthesis) Staff Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

1d

High Performance DSP core Implementation(Synthesis) Senior Lead Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

1d

Power Engineer

Qualcomm Noida, Uttar Pradesh

ASIC RTL

1d

Functional Verification Engineer, Senior - Athens or Patra, Greece

Qualcomm Maroúsi, Attica Region

VHDL Verilog

1d

Design Implementation Engineer, Sr Lead

Qualcomm Bangalore, India

FPGA Synthesis

1d

SOC RTL Design Engineer - Staff

Qualcomm Hyderabad, Telangana

FPGA ASIC

1d

SoC Physical Design Engineer (Senior/Lead)

Qualcomm Bangalore, India

FPGA ASIC

1d

SOC Design Verification Engineer

Qualcomm San Diego, California

Verilog System Verilog

1d

FY27 Intern - MSIP Digital Design Verification Engineering Internship - Canada (16 months)

Qualcomm Toronto, Ontario

VHDL Verilog

1d

FY27 Intern - MSIP Digital Design Engineering Internship - Canada (16 months)

Qualcomm Toronto, Ontario

Verilog System Verilog

1d

Staff Mixed-Signal Digital Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

1d

CPU Firmware Verification and Validation / Staff Engineer

Qualcomm Bangalore, India

DFT Design for Test

1d

RF/Analog Design/Mixed-Signal Engineering Internship – Summer 2027

Qualcomm Multiple locations

Verilog SystemVerilog

1d

Hardware (CPU, GPU, SoC, Digital Design, DV) Engineering Internship – Summer 2027

Qualcomm Multiple Locations

Verilog SystemVerilog

1d

Principal Engineer, Analog Design (Team Lead)

Ambiq Micro, Inc. Singapore, Central Singapore

RTL Digital Design

1d

Senior Embedded Software Designer

Kepler Communications Toronto, California

VHDL Verilog

1d

Senior Electrical Engineer

Astranis San Francisco, California

FPGA RTL

1d

Senior Avionics Engineer

Astranis San Francisco, California

FPGA RTL

1d

Senior Manager, Advanced Hardware Compute

Anduril Costa Mesa, California

VHDL Verilog

1d

Principal Digital Hardware Engineer (FPGA/VHDL)

Anduril Costa Mesa, California

VHDL Verilog

1d

Digital Hardware Engineering Lead

Anduril Costa Mesa, California

VHDL Verilog

1d

Verification Engineer | Core Engineering

Jump Trading Bristol

SystemVerilog ASIC

1d

Verification Designer

Fidus Systems Austin, Texas

Remote SystemVerilog FPGA

1d

Sept. 18, 2026

Senior System Software Engineer, SOC

NVIDIA Multiple locations

SOC

2d