today

ASIC Design Engineer - Performance Monitoring

NVIDIA Bengaluru, Karnataka

Verilog ASIC

17h

Power Architecture Engineer

NVIDIA Bengaluru, Karnataka

Verilog ASIC

17h

Senior Circuit Timing Engineer

NVIDIA Santa Clara, California

RTL STA

17h

Senior DTCO Engineer, CPU Physical Design

NVIDIA Multiple locations

Static Timing Place and Route

17h

SOC logic design engineer

Intel Beijing, Beijing

Verilog SystemVerilog

17h

SOC design verification engineer

Intel Multiple locations

RTL Logic Design

17h

Principal Engineer – ASIC SoC Design

Micron Hyderabad, Telangana

Verilog System Verilog

17h

SoC Physical Designer

NXP Semiconductors Tianjin, Tianjin

ASIC RTL

18h

SoC Design Engineer

NXP Semiconductors Tianjin, Tianjin

VHDL Verilog

18h

Senior Staff / Principal Engineer – SoC Physical Design

Qualcomm Bangalore, India

FPGA ASIC

18h

DV Power Vectors & Window Extraction Engineer (Staff/Sr Staff)

Qualcomm Bangalore, India

FPGA RTL

18h

Director, Physical Design (Custom Silicon Group)

Qualcomm Bangalore, India

ASIC RTL

18h

Oct. 10, 2026

Principal Engineer

Microchip Technology Bangalore, India

DFT Design for Test

2d

Engineer I-Design

Microchip Technology Allentown, Pennsylvania

Verilog SystemVerilog

2d

Associate Staff Physical Design Engineer

Silicon Labs Hyderabad, Telangana

Verilog SystemVerilog

2d

Digital Circuit Design Engineer - DRAM Design

Micron Boise, Idaho

RTL STA

2d

Principal PCIe Application Engineer

Micron San Jose, California

FPGA ASIC

2d

Software Engineer III – Radiation Effects Tooling

Blue Origin Greater Seattle Area

VHDL Verilog

2d

Senior EDA Tools Hardware Engineer

Intel Multiple locations

Digital Design STA

2d

E-core CPU Design Manager

Intel Penang, Malaysia

RTL Static Timing

2d

E-core CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core Senior CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core Senior CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core Senior CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

E-core Senior CPU Physical Design Engineer

Intel Penang, Malaysia

RTL Place and Route

2d

AI-Driven Physical Design Engineering (PhD Intern)

Intel Multiple locations

RTL Digital Design

2d

Pre-Silicon Verification Engineer

Intel Multiple locations

Verilog System Verilog

2d

Senior Distribution Sales Manager

Lattice Semiconductor Taipei, Taipei

FPGA ASIC

2d

Design Verification Engineer 2

Lattice Semiconductor Pune, Maharashtra

Verilog System Verilog

2d

Engineer, Digital Design Engineering

Analog Devices Bangalore, India

Verilog SystemVerilog

2d

Senior DFT engineer

Broadcom Singapore, Central Singapore

Verilog ASIC

2d

DFT Engineer

Qualcomm San Diego, California

ASIC RTL

2d

IC/FPGA Design Verification Engineer, Sr Staff

Qualcomm Ottawa, Ontario

SystemVerilog FPGA

2d

SoC Sr Validation Engineer - Power Management

Qualcomm Bangalore, India

FPGA ASIC

2d

ASIC/FPGA Design Verification Engineer, Senior

Qualcomm Ottawa, Ontario

Verilog SystemVerilog

2d

Chip Lead

Silicon Labs Austin, Texas

Verilog System Verilog

2d

ASIC Engineer Intern

HPE Juniper Networks Sunnyvale, California

SystemVerilog ASIC

2d

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA Santa Clara, California

SystemVerilog ASIC

2d

Lead Physical Design Engineer

NXP Semiconductors Pune, Maharashtra

RTL STA

2d

Sr. ASIC Design Engineer (Silicon Engineering)

SpaceX Palo Alto, California

Verilog System Verilog

2d

ASIC Design Engineer (Silicon Engineering)

SpaceX Palo Alto, California

VHDL Verilog

2d

Sr Staff Analog IC Design Engineer

Ambiq Micro, Inc. Austin, Texas

RTL SOC

2d

Oct. 9, 2026

Embedded AI Tools Engineer

Analog Devices Wilmington, Massachusetts

FPGA Synthesis

3d

Staff Engineer, Digital Design Engineering

Analog Devices Multiple locations

RTL Digital Design

3d

CPU Physical Design Engineer

Intel Austin, Texas

RTL Logic Design

3d

Microarchitecture and Design Engineer - AI SoC

Intel Bangalore, India

SystemVerilog RTL

3d