today

GSoC Design Verification Engineer

Qualcomm San Diego, California

Verilog System Verilog

15m

GPU Design Implementation Engineer

Qualcomm San Diego, California

ASIC RTL

15m

ASIC Design Verification Engineer

Qualcomm Santa Clara, California

ASIC RTL

15m

DSP Core Design Engineer, Principal (U.S. Potential Relocation)

Qualcomm Hsinchu City, Taiwan

ASIC RTL

15m

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Santa Clara, California

Verilog SystemVerilog

15m

SoC Power Design Engineer (Engineer - Staff Eng)

Qualcomm San Diego, California

VHDL Verilog

15m

Power Modelling Engineer, Staff

Qualcomm Bangalore, India

ASIC RTL

15m

Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer

Qualcomm San Diego, California

ASIC RTL

15m

SoC Performance Architect (Server CPU)

Qualcomm Multiple locations

SOC

15m

Staff / Senior Staff Engineer - ASIC / NoC SoC deployment architect - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

ASIC RTL

15m

Physical Design Engineer

Qualcomm San Diego, California

ASIC RTL

15m

Staff Design Verification Engineer – Coherent Interconnect (CHI)

SiFive Multiple locations

SystemVerilog ASIC

48m

System Validation Engineer (New Grads)

SiFive Multiple locations

Verilog FPGA

48m

Staff Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog ASIC

48m

Staff Design Verification Engineer – CPU Core Verification (Vector)

SiFive Multiple locations

SystemVerilog ASIC

48m

Staff Design Verification Engineer – CPU Core Verification (ALU)

SiFive Multiple locations

SystemVerilog ASIC

48m

Staff Design Verification Engineer – CPU Core Formal Verification

SiFive Multiple locations

ASIC RTL

48m

Staff Design Verification Engineer – CPU Core Formal Verification

SiFive Multiple locations

ASIC RTL

48m

Staff Design Verification Engineer – CPU Core Formal Verification

SiFive Austin, Texas

ASIC RTL

48m

Senior Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog RTL

48m

Senior Design Verification Engineer – CPU Core Verification (Vector)

SiFive Multiple locations

SystemVerilog RTL

48m

Product Power Engineer

SiFive Multiple locations

FPGA ASIC

48m

yesterday

CPU Server Physical Design Engineer

Qualcomm Santa Clara, California

VHDL Verilog

1d

Low Power Design Engineer(NPU)-Sr Lead

Qualcomm Bangalore, India

RTL Synthesis

1d

Sept. 12, 2026

GPU Validation and Emulation Engineer, Senior

Qualcomm San Diego, California

Verilog System Verilog

1d

Modem design/RTL (Sr Staff)

Qualcomm Bangalore, India

VHDL Verilog

1d

(Structural ATPG) APAC Digital SOC Test Engineer

Qualcomm Hsinchu City, Taiwan

DFT Design for Test

1d

EDA/CAD SW Engineer (Multiple Levels)

Qualcomm San Diego, California

Verilog System Verilog

1d

FY27 Intern - Display IP Engineering Internship - Canada (16 months)

Qualcomm Markham, Ontario

VHDL Verilog

1d

FY27 Intern - Compute DSP/AI Processor Engineering Internship - Canada (16 months)

Qualcomm Markham, Ontario

VHDL Verilog

1d

Analog Engineer, Principal

Qualcomm Toronto, Ontario

VHDL Verilog

1d

FPGA Firmware Engineer / FPGA Design Engineer

Qualcomm San Diego, California

Verilog System Verilog

1d

Staff / Senior Staff Microarchitect / System Engineer

Qualcomm Noida, Uttar Pradesh

Verilog UVM

1d

Staff design Verification Engineer

Qualcomm Noida, Uttar Pradesh

Verilog System Verilog

1d

Physical Design Engineer

Qualcomm Bangalore, India

FPGA STA

1d

Staff SOC Verification Engineer

Qualcomm Noida, Uttar Pradesh

Verilog System Verilog

1d

Performance Optimization Architect/Manager

Qualcomm Bangalore, India

Verilog System Verilog

1d

Senior Lead Pre/Post Silicon Validation Engineer - SoC Security and access control Expertise

Qualcomm Bangalore, India

FPGA ASIC

1d

Senior SoC Physical Design Engineer

Qualcomm Bangalore, India

FPGA ASIC

1d

VLSI Software Engineer

Qualcomm Tijuana, Baja California

ASIC RTL

1d

Analog / Mixed-Signal SerDes Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

Verilog ASIC

1d

CPU Server Physical Design Methodology, Infrastructure and Automation Engineer

Qualcomm Santa Clara, California

VHDL Verilog

1d

Infra Design Verification Sr Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1d

Infra-Sr Staff Design Verification Engineer

Qualcomm Bangalore, India

Verilog System Verilog

1d

Test Engineer Intern - Summer 2027

NXP Semiconductors Austin, Texas

Digital Design SOC

1d

ASIC Design Automation Engineer

Broadcom USA-Colorado-Fort Collins-4380 Ziegler Road

Verilog ASIC

1d

DSP System Architect

Broadcom Irvine, California

ASIC RTL

1d

Senior Product Development Engineer

NVIDIA Santa Clara, California

ASIC Digital Design

2d

Senior DFT Engineer

NVIDIA Multiple locations

RTL DFT

2d

Power Architecture Engineer

NVIDIA Bengaluru, Karnataka

Verilog ASIC

2d