Design Verification Infrastructure Engineer - Platform SiFive Multiple locations Chisel Verification 3h
Senior Hardware Design Engineer – PCB & Reference Platforms - Cork, Ireland Qualcomm Cork, Munster ASIC SOC 3h
CPU Server Physical Design Methodology, Infrastructure and Automation Engineer Qualcomm Santa Clara, California STA Place and Route 3h
DDRSS Validation Engineer (RTL + Silicon Debug) Qualcomm San Diego, California Verilog SystemVerilog 3h
Systems Software Engineer – Sensors (UX Frontend Focus) - Cork, Ireland Qualcomm Cork, Munster ASIC SOC 3h
FY27 Intern - CPU Engineering Internship 2027 - 6 months, Cork Qualcomm Cork, Munster Verilog System Verilog 3h
RISCV CPU Systems Architecture/RTL Engineer – Senior Level Qualcomm Santa Clara, California VHDL Verilog 3h
Architecture Engineer, Senior Staff - Hod HaSharon Qualcomm Hod HaSharon, Central District ASIC SOC 3h
Processor Design Verification Engineer Qualcomm San Diego, California SystemVerilog Digital Design 3h