today

Senior System Level Verification Engineer

Axiado Hyderabad, Telangana

FPGA ASIC

18h

Senior Engineer II - Backend Implementation

Microchip Technology Bangalore, India

Verilog STA

18h

Senior Engineer II - Backend Implementation

Microchip Technology Hyderabad, Telangana

Verilog FPGA

18h

Principal Engineer – Design Engineering

Microchip Technology Bangalore, India

VHDL Verilog

18h

Principal Engineer-Design (SoC Integration and RTL/IP)

Microchip Technology Chandler, Arizona

SystemVerilog FPGA

18h

Analog Mixed Signal Firmware Engineer

Apple Cupertino, California

Verilog SystemVerilog

18h

Wireless SoC Design Engineer

Apple Multiple Locations

Verilog ASIC

18h

Wireless SoC Design Engineer

Apple Multiple Locations

Verilog ASIC

18h

Wireless RTL Design Engineer

Apple Multiple Locations

RTL Logic Design

18h

Principal/Sr. Principal FPGA Design Engineer

Northrop Grumman Rolling Meadows, Illinois

FPGA Verification

18h

FPGA Digital Design Engineer Level 3 (AHT)

Northrop Grumman Northridge, California

VHDL Verilog

18h

Test Engineer (ATE)

Broadcom San Jose, California

ASIC DFT

18h

System Verification Engineer

NVIDIA Austin, Texas

FPGA ASIC

18h

Senior System Verification Engineer

NVIDIA Austin, Texas

Verilog FPGA

18h

Senior System Verification Engineer

NVIDIA Austin, Texas

Verilog FPGA

18h

Safety product development F/M

NXP Semiconductors Multiple locations

DFT SOC

19h

Digital IP Design - Senior Lead Engineer

NXP Semiconductors Noida, Uttar Pradesh

VHDL Verilog

19h

Safety product development F/M

NXP Semiconductors Noida, Uttar Pradesh

DFT SOC

19h

FPGA Systems Development Engineer

Analog Devices Copenhagen, Capital Region of Denmark

FPGA RTL

19h

Principal Electrical Engineer (Sign On Bonus Available)

BAE Systems Nashua, New Hampshire

VHDL FPGA

19h

Senior Principal Electrical Engineer (Sign On Available)

BAE Systems Nashua, New Hampshire

VHDL FPGA

19h

Principal Electrical Engineer (Sign On Bonus Available)

BAE Systems Nashua, New Hampshire

VHDL FPGA

19h

Senior Principal FPGA (VHDL) Design Engineer - Sign on Bonus Available

BAE Systems Nashua, New Hampshire

VHDL Verilog

19h

Senior Principal FPGA Design Engineer

BAE Systems Wayne, New Jersey

VHDL Verilog

19h

Sr. Verification Engineer

Blue Origin Longmont, Colorado

VHDL SystemVerilog

19h

Intern - Memory Design Engineer, HBM

Micron Richardson, Texas

VHDL Verilog

19h

Senior Design Verification Engineer

Micron San Jose, California

RTL Verification

19h

E-core CPU Full Chip Physical Design Engineer

Intel Penang, Malaysia

STA Synthesis

20h

E-core CPU Power Delivery Engineer

Intel Penang, Malaysia

RTL SOC

20h

Staff Logic Design Engineer

Intel Penang, Malaysia

Verilog System Verilog

20h

GPU Performance Verification Engineer

Intel Bangalore, India

RTL UVM

20h

Senior SOC Design Engineer

Intel Penang, Malaysia

RTL UVM

20h

GPU Design Verification Engineer

Intel Multiple locations

Verilog System Verilog

20h

GPU Design Verification Engineer

Intel Multiple locations

Verilog System Verilog

20h

SoC Logic Design Engineer

Intel San Jose, California

SystemVerilog RTL

20h

Lead SoC Performance Architect

Qualcomm Santa Clara, California

RTL SOC

20h

Principal/Manager, SoC Systems Validation Engineering

Qualcomm Tijuana, Baja California

ASIC RTL

20h

EVA Design Verification Engineer, Senior - Cork, Ireland

Qualcomm Cork, Munster

Verilog SystemVerilog

20h

Peripherals (Ethernet) Validation Engineer – Staff/ Sr. Lead / Senior Engineer

Qualcomm Bangalore, India

ASIC SOC

20h

GPU Low Power Engineer

Qualcomm San Diego, California

Verilog System Verilog

20h

Sr. FPGA Engineer II

Rocket Lab Long Beach, California

VHDL FPGA

20h

FPGA Digital Design Engineer

Kepler Communications Toronto, California

VHDL Verilog

20h

Staff HDL Hardware Engineer

BlackSky Tukwila, Washington

VHDL FPGA

20h

Senior FPGA Verification Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

20h

Senior FPGA Verification Engineer

Anduril Boulder, Colorado

VHDL Verilog

20h

Senior FPGA Verification Engineer

Anduril Goleta, California

VHDL Verilog

20h

Senior Embedded Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

20h

yesterday

Staff Engineer - CPU DV

SiFive Hyderabad, Telangana

Verilog System Verilog

1d

DFT - Staff OR Principal- Eng/Manager

Qualcomm Hyderabad, Telangana

ASIC RTL

1d

ASIC/FPGA Design Verification Engineer

Qualcomm Ottawa, Ontario

Verilog SystemVerilog

1d