today

Senior Staff Radar Modeling Simulation Analysis Systems Engineer

Northrop Grumman United States-Maryland-Baltimore

VHDL Verilog

1h

Space Vehicle Verification and Validation Lead - Blue Ring

Blue Origin Multiple locations

Verification

1h

Senior Firmware Engineer, Security

Blue Origin Multiple locations

FPGA ASIC

1h

Senior Avionics Hardware Engineer - Lunar Permanence

Blue Origin Multiple locations

FPGA Design for Test

1h

Senior Physical Design Engineer

Analog Devices Multiple locations

ASIC RTL

2h

Front-End Integration Engineer

NVIDIA Bengaluru, Karnataka

ASIC RTL

2h

Formal Verification Engineer

NVIDIA Shanghai, Shanghai

ASIC RTL

2h

Senior ASIC Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

2h

Senior Full-stack Software Engineer – Verification Data and Visualization Platform

NVIDIA Multiple locations

Verification

2h

Senior Verification Engineer, Digital IP

NXP Semiconductors Bangalore, India

Verilog System Verilog

2h

Senior Digital Design Engineer

NXP Semiconductors Pune, Maharashtra

Verilog System Verilog

2h

Senior Physical Design Engineer

NXP Semiconductors Pune, Maharashtra

RTL STA

2h

Lead Physical Design Engineer

NXP Semiconductors Pune, Maharashtra

ASIC RTL

2h

Sr. Principal Technical Program Manager – Digital IP Development

NXP Semiconductors Austin, Texas

RTL Synthesis

2h

Senior Verification Engineer

NXP Semiconductors Austin, Texas

VHDL Verilog

2h

Senior Engineer II - IP Verification

Microchip Technology Hyderabad, Telangana

FPGA UVM

2h

Software Engineer

Microchip Technology Toronto, Ontario

FPGA Digital Design

2h

Engineer II - Design

Microchip Technology Hauppauge, New York

VHDL Verilog

2h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

2h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

2h

Pre-Si FPGA Platform Development Engineer (Temporary position)

Intel Guadalajara, Jalisco

VHDL Verilog

2h

FPGA Design Lead Electronic Combat Solutions

BAE Systems Multiple locations

VHDL Verilog

2h

Associate Staff Modem Verification Engineer

Silicon Labs Hyderabad, Telangana

SystemVerilog FPGA

2h

Senior Electrical Engineer II

Rocket Lab Pasadena, California

Verilog FPGA

2h

ASIC Technical Project Manager

Hudson River Trading New York, NY, United States

ASIC RTL

3h

Senior Manager System Verification (SVT)

Celero Communications, Inc. Ottawa, California

Verification

3h

yesterday

Sr CAD Engineer (Digital)

Analog Devices Bangalore, India

RTL Synthesis

1d

Senior ASIC Design Engineer

HPE Juniper Networks Bengaluru, Karnataka

Verilog ASIC

1d

ASIC Design Engineer 2

HPE Juniper Networks Sunnyvale, California

Verilog System Verilog

1d

Principal Electrical Engineer

BAE Systems Dallas, Texas

VHDL Verilog

1d

Senior Systems Engineer – Aftermarket & Production Support

BAE Systems Endicott, New York, United States

VHDL FPGA

1d

Formal Verification Engineer

Intel Bangalore, India

Verilog System Verilog

1d

CPU Validation Engineer

Intel Austin, Texas

Verilog System Verilog

1d

Senior DFT Methodology - Data Analytics and Applied AI Engineer

NVIDIA Santa Clara, California

DFT Design for Test

1d

Radar Modeling Simulation Analysis Associate Systems Engineer

Northrop Grumman United States-Maryland-Linthicum

VHDL Verilog

1d

SLD Avionics FPGA Engineer III - Lunar Permanence

Blue Origin Denver, Colorado

VHDL Verilog

1d

Senior Test Integration Engineer – HLS Test Definition

Blue Origin Space Coast, Florida

HLS Verification

1d

Systems Engineer II — Lunar Human Landing System (HLS)

Blue Origin Multiple locations

HLS Verification

1d

Shift Leader - Cleaning, Passivation, and Verification Lab

Blue Origin Greater Seattle Area

Verification

1d

CPU Microarchitect/RTL Engineer

Apple Austin, Texas

VHDL Verilog

1d

Senior Engineer I - ASIC Verification

Microchip Technology Penang, Malaysia

SystemVerilog RTL

1d

Intern- Engineering (Design)

Microchip Technology Chandler, Arizona

Verilog System Verilog

1d

Intern- Engineering (Verification)

Microchip Technology Chandler, Arizona

Verilog System Verilog

1d

Principal Engineer - CAD (Physical Verification)

Microchip Technology Chandler, Arizona

Verification

1d

Technical Staff Engineer - Verification

Microchip Technology Multiple locations

Verilog System Verilog

1d

Physical Design Intern

Marvell Petah-Tikva

VHDL Verilog

1d

Digital Design Engineer (f/m/d)

NXP Semiconductors Munich, Bavaria

Digital Design Verification

1d

Digital Verification Engineer

NXP Semiconductors Munich, Bavaria

Verification

1d

FPGA Designer

Fidus Systems Austin, Texas

VHDL Verilog

1d

Senior Embedded Software Engineer - Qualcomm SoC / BSP & Hardware Bring-Up

ALTEN Technology USA Auburn Hills, Michigan

SOC

1d