FPGAjobs - Jobs for Logic Designers!

Silicon Validation Engineer

MatX Multiple locations

Remote SystemVerilog RTL

Senior SoC Power Analysis & Optimization Engineer

MatX Multiple locations

Remote Verilog SystemVerilog

Design Verification Engineer

MatX Multiple locations

Remote SystemVerilog UVM

BMC Firmware Engineer

MatX Multiple locations

Remote FPGA ASIC

System Software Engineer, Linux Kernel and Device Drivers

MatX Multiple locations

Remote FPGA RTL

Micro-Architect and RTL Designer

MatX Multiple locations

Remote SystemVerilog ASIC

SOC Integration Engineer

MatX Multiple locations

Remote SystemVerilog RTL

Emulation Engineer

MatX Multiple locations

Remote Verilog SystemVerilog

SOC Micro-Architect and RTL Designer

MatX Multiple locations

Remote SystemVerilog ASIC

Formal Verification Engineer

MatX Multiple locations

Remote RTL HDL

Rust SW-Silicon Co-verification Engineer

MatX Multiple locations

Remote FPGA Verification

SOC Architect

MatX Multiple locations

Remote Verilog SOC

Silicon Design-for-Test (DFT) Engineer

MatX Multiple locations

Remote DFT Design for Test

ASIC/SOC CAD Engineer

MatX Multiple locations

Remote ASIC RTL

ASIC/SOC Silicon Physical Design Engineer

MatX Multiple locations

Remote ASIC RTL

SoC Design Verification Engineer

MatX Multiple locations

Remote SystemVerilog UVM

ASIC Verification Engineer

HPE Juniper Networks Bengaluru, Karnataka

SystemVerilog ASIC

Senior VLSI Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Place and Route

Verification Engineer - ARM Fabric Unit Level

NVIDIA Multiple locations

FPGA UVM

Senior ASIC Verification Engineer - HSIO

NVIDIA Multiple locations

SystemVerilog ASIC

CPU Design Methodology Engineer

NVIDIA Multiple locations

Verilog System Verilog

Senior Platform Engineer, Design Automation

NVIDIA Santa Clara, California

RTL Static Timing

System Software Engineer – GPU and SOC (2027 RDSS Intern)

NVIDIA Taipei, Taipei

SOC

NVIDIA 2027 Internships: Ph.D. Research Hardware

NVIDIA Santa Clara, California

Verilog SystemVerilog

NVIDIA 2027 Internships: Mixed Signal Design

NVIDIA Santa Clara, California

VHDL Verilog

NVIDIA 2027 Internships: Hardware Verification

NVIDIA Santa Clara, California

VHDL Verilog

NVIDIA 2027 Internships: Hardware Physical Design / VLSI

NVIDIA Santa Clara, California

Logic Design Digital Design

NVIDIA 2027 Internships: Hardware Engineering

NVIDIA Santa Clara, California

VHDL Verilog

NVIDIA 2027 Internships: Hardware Design for Test (DFT)

NVIDIA Santa Clara, California

Digital Design STA

NVIDIA 2027 Internships: Hardware ASIC Design

NVIDIA Santa Clara, California

VHDL Verilog

NVIDIA 2027 Internships: Digital Circuit Design

NVIDIA Santa Clara, California

VHDL Verilog

NVIDIA 2027 Internships: Computer Architecture

NVIDIA Santa Clara, California

VHDL Verilog

CPU Verification Engineer

NVIDIA Bengaluru, Karnataka

Verification

Verification Engineer - PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

Senior System Software Engineer - SoC Power

NVIDIA Multiple locations

SOC

Verification Engineer - PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

Senior Verification Engineer, PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

Senior ASIC Verification Engineer

NVIDIA Santa Clara, California

ASIC UVM

Senior ASIC Power Management Micro Architect, Chip Design

NVIDIA Tel Aviv, Tel Aviv District

ASIC RTL

Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

Verilog System Verilog

Verification Engineer - PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

Senior ASIC Design Engineer

NVIDIA Santa Clara, California

Verilog System Verilog

Hardware Verification Engineer

Semtech San Diego, California

VHDL Verilog

Sr Staff Engineer - Analog IC

Semtech Hyderabad, Telangana

Verilog SystemVerilog

Digital Signal Processing and System Validation Engineer

Broadcom USA-California-San Jose-1320 Ridder Park Drive

Verilog System Verilog

Foundation IP Memory Verification Engineer

Broadcom Singapore, Central Singapore

DFT Verification

Foundation IP Memory Verification Engineer

Broadcom Singapore, Central Singapore

DFT Verification

Foundation IP Design Engineer

Broadcom Singapore, Central Singapore

DFT Verification

Foundation IP Design Engineer

Broadcom Singapore, Central Singapore

DFT Verification

Foundation IP Design Engineer

Broadcom Singapore, Central Singapore

DFT Verification

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