today

BT - Design Verification Staff Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

6h

RTL Design Engineer, Sr Lead

Qualcomm Bangalore, India

Verilog SystemVerilog

6h

Senior ASIC Implementation Engineer, Low Power AI

Qualcomm Markham, Ontario

VHDL Verilog

6h

CPU Physical Design Engineer

Qualcomm Bangalore, India

FPGA RTL

6h

WIFI PHY Senior Design Verification Engineer

Qualcomm Bangalore, India

Verilog System Verilog

6h

CPU Design Sr Lead Verification Engineer

Qualcomm Bangalore, India

Verilog System Verilog

6h

Staff Hardware Design Engineer, SoC/SIP

Qualcomm Multiple locations

SOC

6h

Silicon Test Engineer, Senior

Qualcomm Tijuana, Baja California

Digital Design DFT

6h

SoC Systems Performance Engineer, Senior

Qualcomm San Diego, California

SOC Verification

6h

Emulation Methodology Engineer

Qualcomm San Diego, California

ASIC RTL

6h

CAD RTL/DV Infrastructure Engineer, Sr Staff

Qualcomm Bangalore, India

Verilog SystemVerilog

6h

Software Engineer - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

VHDL Verilog

6h

Physical Design Engineer- senior

Qualcomm Austin, Texas

ASIC RTL

6h

Hardware Verification Senior/Staff/Senior Staff Engineer at Qualcomm Interconnect Technology Center (QITC)

Qualcomm Guyancourt, Île-de-France

Verilog SystemVerilog

6h

Senior HW IP designer - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

Verilog ASIC

6h

Physical Design - Sr Engineer

Qualcomm Chennai, Tamil Nadu

STA Place and Route

6h

RF/Analog IC Design Engineer

Qualcomm Santa Clara, California

ASIC SOC

6h

Engineer, Senior Staff - ASIC Chief Architect - Hod HaSharon

Qualcomm Hod HaSharon, Central District

ASIC SOC

6h

DDR IP validation and Firmware development (Senior/Lead/Staff)

Qualcomm Bangalore, India

FPGA SOC

6h

SOC Design Verification Engineer– Pre-Si/Post-Si Verification

Qualcomm Tijuana, Baja California

Verilog SystemVerilog

6h

SOC Design Verification Engineer– Pre-Si/Post-Si Verification

Qualcomm Tijuana, Baja California

Verilog SystemVerilog

6h

SOC Design Verification Engineer

Qualcomm San Diego, California

ASIC RTL

6h

SOC Design Verification Engineer, Staff– Pre-Si/Post-Si Verification

Qualcomm Tijuana, Baja California

Verilog SystemVerilog

6h

SOC Design Verification Engineer-Staff

Qualcomm San Diego, California

ASIC RTL

6h

SOC Power Architecture Engineer

Qualcomm San Diego, California

ASIC Logic Design

6h

2027 Campus Hire_ Associate Engineer_ HW

Qualcomm Multiple locations

VHDL Verilog

6h

2027 Campus Hire_ Engineer_ HW

Qualcomm Multiple locations

VHDL Verilog

6h

Physical Synthesis Implementation Engineer

Qualcomm San Diego, California

ASIC Digital Design

6h

Staff ASIC Verification Engineer, Low Power AI

Qualcomm Markham, Ontario

VHDL Verilog

6h

HW SoC/IP modeling and performance/power analyst Senior or Staff Engineer - Qualcomm - Sophia-Antipolis or Guyancourt, France

Qualcomm Bainbridge, Alpes-de-Haute-Provence, France

VHDL Verilog

6h

Security HW Design Verification Engineer, Senior - Cork, Ireland

Qualcomm Cork, Munster

ASIC UVM

6h

(Sr) Staff SOC Architect - AI Accelerators (Multiple Locations)

Qualcomm Multiple Locations

ASIC SOC

6h

CPU Physical Design Engineer, Senior to Senior Staff Level

Qualcomm Hsinchu City, Taiwan

ASIC RTL

6h

VLSI Design Engineer for Server / Data Center Products

Qualcomm Multiple locations

FPGA ASIC

6h

Lead Engineer Senior - Performance Modeling

Qualcomm Bangalore, India

VHDL Verilog

6h

CPU Architect – Security and MMU Aspects - Hod HaSharon

Qualcomm Hod HaSharon, Central District

RTL SOC

6h

Sr. Engineer, Machine Learning Software Verification

Qualcomm Markham, Ontario

Verification

6h

CPU Physical Design CAD Engineer (Lead/Staff/Sr Staff)

Qualcomm Multiple locations

FPGA Digital Design

6h

Sr. FPGA Engineer II

Rocket Lab Chantilly, Virginia

VHDL FPGA

7h

Senior FPGA Engineer II

Rocket Lab Tucson, Arizona

VHDL FPGA

7h

yesterday

Staff Engineer, Design Verification Engineering

Analog Devices Bangalore, India

SystemVerilog RTL

1d

Staff Engineer, Design Verification Engineering

Analog Devices Bangalore, India

Verilog SystemVerilog

1d

FPGA Design Engineer Level 2

Northrop Grumman United States-Maryland-Linthicum

VHDL Verilog

1d

Engineer/Principal Engineer Digital-RF Subsystems I&T

Northrop Grumman United States-Maryland-Baltimore

VHDL Verilog

1d

Principal Engineer/Sr. Principal Engineer Digital-RF Subsystems I&T Lead

Northrop Grumman United States-Maryland-Baltimore

VHDL Verilog

1d

R10230854 Principal/ Senior Principal Hardware/Firmware CAM

Northrop Grumman United States-California-Woodland Hills

VHDL Verilog

1d

DMA designer, up to Staff

Qualcomm Taipei, Taipei

SystemVerilog ASIC

1d

Modem Hardware Design Verification Engineer – AI Driven Next Gen Modem Hardware Development, Staff

Qualcomm Boxborough, Massachusetts

VHDL Verilog

1d

DDR STA/Timing Engineer (Staff/ Senior Staff)

Qualcomm Bangalore, India

FPGA ASIC

1d

GPU Design Engineer

Qualcomm Austin, Texas

Verilog SystemVerilog

1d