today

Sr. Principal Digital Engineer

Northrop Grumman Multiple locations

VHDL FPGA

9h

Engineer II - Electrical

BAE Systems Dallas, Texas

VHDL Verilog

9h

Principal Engineer, Analog Design Engineering

Analog Devices Multiple locations

Verilog SOC

9h

Digital Design Engineer, DFT

Analog Devices Philippines, Bonifacio Global City

ASIC DFT

9h

Senior Formal Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

Verification

9h

PMU ASIC Engineer - New College Graduate 2027

NVIDIA Shanghai, Shanghai

ASIC RTL

9h

PMU Verification Engineer - New College Graduate, 2027

NVIDIA Shanghai, Shanghai

Verilog SystemVerilog

9h

ASIC Verification Engineer - Hardware

NVIDIA Shanghai, Shanghai

SystemVerilog ASIC

9h

Senior DFX Engineer

NVIDIA Shanghai, Shanghai

Verilog ASIC

9h

DFX Engineering

NVIDIA Shanghai, Shanghai

Verilog ASIC

9h

System Software Engineering Intern, GPU and SOC - Summer 2027

NVIDIA Taipei, Taipei

SOC

9h

Formal Verification Engineer - New College Graduate

NVIDIA Budapest, Budapest

Verilog System Verilog

9h

Software Verification Engineer, DOCA

NVIDIA Multiple locations

Verification

9h

DFT Intern - 2027

NVIDIA Shanghai, Shanghai

Verilog Logic Design

9h

VLSI Logic Design Intern

HPE Juniper Networks Chippewa Falls, Wisconsin, United States of America

Verilog System Verilog

10h

ASIC Verification Engineering Intern

HPE Juniper Networks Roseville, California

Verilog SystemVerilog

10h

VLSI Design Verification Intern

HPE Juniper Networks Ft. Collins, Colorado, United States of America

VHDL Verilog

10h

VLSI Logic Design Intern

HPE Juniper Networks Ft. Collins, Colorado, United States of America

Verilog System Verilog

10h

ASIC Intern

HPE Juniper Networks Sunnyvale, California

VHDL Verilog

10h

Physical Design Engineering Student

Intel Haifa, Haifa District

Digital Design Place and Route

10h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

10h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

10h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

10h

Logic Design / Design Verification Engineering Undergraduate Intern

Intel Leixlip, Leinster

VHDL Verilog

10h

Ethernet System Integration Engineer

Intel Hillsboro, Oregon

ASIC SOC

10h

Ethernet System Integration Engineer

Intel Hillsboro, Oregon

ASIC SOC

10h

Project Engineer II – FPGA Lead & Design Engineer

BAE Systems Westminster, Colorado

VHDL Verilog

10h

Senior Principal Engineer

NXP Semiconductors Noida, Uttar Pradesh

Digital Design Synthesis

10h

Technical Lead Verification

NXP Semiconductors Bangalore, India

Verification

10h

Recruiter (Fixed Term)

Blue Origin Greater Seattle Area

ASIC RTL

10h

ASIC Design Engineer – Fabric/Interconnect

Apple Multiple Locations

RTL STA

10h

Senior Engineer IP Verification - Digital Design Verification

Micron Hyderabad, Telangana

RTL UVM

10h

Staff Engineer IP Verification - Digital Design Verification

Micron Hyderabad, Telangana

RTL UVM

10h

ENGINEER, DESIGN

Micron Avezzano, Abruzzo

ASIC RTL

10h

SR ENGINEER, DESIGN

Micron Avezzano, Abruzzo

RTL Logic Design

10h

SR ENGINEER, DESIGN

Micron Avezzano, Abruzzo

ASIC RTL

10h

ENGINEER, DESIGN

Micron Avezzano, Abruzzo

FPGA RTL

10h

Senior System Level Verification Engineer

Axiado Hyderabad, Telangana

FPGA ASIC

10h

Senior System Level Verification Engineer

Axiado San Jose, California

FPGA ASIC

10h

Senior Customer Support Engineer, Physical Design

SiFive Bengaluru, Karnataka

RTL Place and Route

10h

ASIC Modelling Engineer, Senior - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

10h

Near-Memory Compute System Validation Engineer

Qualcomm San Diego, California

FPGA ASIC

10h

NOC DV Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10h

NOC DV Sr Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10h

CPU STA Engineer, Sr Engineer

Qualcomm Hyderabad, Telangana

Verilog FPGA

10h

NPU Design Verification Sr Lead Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

10h

NPU Staff Design Verification Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

10h

ASIC RTL Design Engineer (Sr. Engr / Sr. Lead Engr

Qualcomm Bangalore, India

Verilog ASIC

10h

Staff Design Engineer - Cork, Ireland

Qualcomm Cork, Munster

ASIC RTL

10h

ASIC Design Verification Engineer

Broadcom Multiple locations

ASIC RTL

11h