FPGA & RTL Jobs at Marvell
170 open logic design roles at Marvell.
ASIC jobs DFT jobs RTL jobs SOC jobs STA jobs SystemVerilog jobs UVM jobs Verification jobs Verilog jobs California Hồ Chí Minh Ontario
DFT Principal Engineer
Design Verification, Manager
Design Verification Senior Staff Engineer
Senior Manager, ASIC Design
Staff to Senior Staff Engineer, DFT
DSP Firmware Engineer
Principal Engineer, Verification
Principal Engineer - Digital IC Design
Principal Design Verification Engineer
Senior Principal Engineer, Design Verification
DFT Manager
Are you hiring for these positions?
Claim this company
to see how your roles are performing.