Sept. 12, 2026

Power Architecture Engineer

NVIDIA Bengaluru, Karnataka

Verilog ASIC

2d

Senior Hardware Security Architect

NVIDIA Santa Clara, California

Verilog ASIC

2d

Silicon Co-design Intern - 2027

NVIDIA Shanghai, Shanghai

ASIC Digital Design

2d

Blue Ring Mission Systems Requirements & Verification Engineer

Blue Origin Greater Seattle Area

Verification

2d

Analog Mixed-Signal IC Design Engineer (Custom Digital Timing Characterization and Liberty Modeling) – TeraWave

Blue Origin San Diego, California

Verilog SystemVerilog

2d

Avionics Hardware Engineer

Blue Origin Multiple locations

FPGA Design for Test

2d

Senior Electrical Engineer – TeraWave High-Speed Digital & Networking Payload Hardware

Blue Origin Greater Seattle Area

FPGA DFT

2d

Aerospace Systems Engineer III - Blue Ring Space Vehicle Requirements & Verification Architect (MTN)

Blue Origin Multiple locations

Verification

2d

Sr. Manufacturing PCBA Design & SMT Fab DFX Engineer

Blue Origin Bay Area, CA; Greater Seattle Area

FPGA ASIC

2d

Senior Manufacturing Opto-Mechanical & Sensor DFX Engineer

Blue Origin Bay Area, CA

DFT Design for Test

2d

Sr. Senior Manufacturing Surface Treatment, Sealing & Adhesion DFX Engineer

Blue Origin Bay Area, CA

DFT Design for Test

2d

Senior Electrical Engineer - Power Design - TeraWave

Blue Origin Denver, Colorado

FPGA Digital Design

2d

Senior Electrical Engineer - Circuit Design - TeraWave

Blue Origin Denver, Colorado

FPGA Digital Design

2d

RFIC Layout Engineer

Apple Multiple Locations

RTL SOC

2d

GPU IP Verification Engineer

Intel Bangalore, India

VHDL Verilog

2d

GPU IP Integration Model Build Engineer

Intel Bangalore, India

UVM OVM

2d

Senior PDK Support Engineer (Physical Verification)

Intel Multiple locations

SOC Verification

2d

CPU Circuit Design Engineer

Intel Bangalore, India

Verilog Digital Design

2d

Senior Engineer II - Validation (ASIC)

Microchip Technology Basking Ridge, New Jersey

ASIC

2d

Senior Principal FPGA Verification Engineer - $30K Sign-On Bonus

BAE Systems Westminster, Colorado

VHDL Verilog

2d

Ph.D. Intern - Architecture, DSP & Systems Architecture

Marvell Multiple locations

Verilog SystemVerilog

2d

Cyber Security Operations Analyst (Tier 2 SOC)

Marvell Bangalore, India

SOC

2d

Summer Program Intern

Marvell Cordoba, Argentina

Verilog Digital Design

2d

Electrical Engineer

CACI Florham Park, NJ, US

VHDL Verilog

2d

Electrical Engineer

CACI Florham Park, NJ, US

VHDL Verilog

2d

Embedded Systems Engineer

CACI San Antonio, Texas

VHDL Verilog

2d

Physical Design Engineer (Silicon Engineering)

SpaceX Palo Alto, California

ASIC RTL

2d

Physical Design Engineer (Silicon Engineering)

SpaceX Irvine, California

ASIC RTL

2d

Physical Design Engineer (Silicon Engineering)

SpaceX Austin, Texas

ASIC RTL

2d

Senior FPGA Verification Engineer

Anduril Boulder, Colorado

VHDL Verilog

2d

Senior FPGA Verification Engineer

Anduril Goleta, California

VHDL Verilog

2d

Senior FPGA Verification Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

2d

Senior Firmware Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

2d

Senior Embedded Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

2d

Design Verification Engineer - Compute

MatX Mountain View, California

Remote SystemVerilog UVM

2d

Sept. 11, 2026

Principal FPGA Designer – TeraWave

Blue Origin Greater Seattle Area

VHDL Verilog

3d

Senior Engineer, Digital Design Engineering

Analog Devices Egypt, New Cairo

SystemVerilog FPGA

3d

GPU IP Lead Emulation Model Build Engineer

Intel Bangalore, India

FPGA RTL

3d

Design Verification Engineer

Intel Santa Clara, California

SystemVerilog FPGA

3d

Junior CPU Verification Engineer

Intel Multiple locations

Verilog System Verilog

3d

​​Digital Signal Processing Engineer​

Semtech Meylan, Auvergne-Rhône-Alpes

SystemVerilog RTL

3d

Engineering Intern (EE/CE/RF) III, Summer 2027 (Hybrid)

BAE Systems Nashua, New Hampshire

VHDL Verilog

3d

FPGA Engineer

Philips Suzhou

VHDL Verilog

3d

Senior Power Architect, SoC Power and Thermal Management SW

NVIDIA Santa Clara, California

SOC

3d

Senior System Integration and Validation Engineer

NVIDIA Santa Clara, California

Logic Design DFT

3d

ASIC Design Engineer – Clocks IP

NVIDIA Multiple locations

Verilog ASIC

3d

Formal Verification Engineer

NVIDIA Bengaluru, Karnataka

Verilog System Verilog

3d

Senior System Level Testability Engineer

NVIDIA Santa Clara, California

Digital Design SOC

3d

ASIC Design Engineer - New College Grad 2026

NVIDIA Santa Clara, California

VHDL Verilog

3d

Senior Verification Engineer, PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

3d