SMTS Silicon Design Engineer
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
SMTS SILICON DESIGN ENGINEER
THE ROLE:
The ideal candidate will get to work on Verification of complex Analog Mixed Signal IPs (with significant Digital and Analog content) that are delivered to various AMD SoCs.
KEY RESPONSIBILITIES:
Verification of IP features : Feature Test plan creation, Verification of the IP in RTL, Gatesim and Analog Mixed Signal simulations.
Create methodology-based (UVM) verification testbenches and components from scratch for various IP features.
Quality deliverables through regressions
Verification coverage: code-coverage, functional coverage, assertions, to achieve 100% verification completeness
Reviews, and feedback to design/architecture teams.
PREFERRED EXPERIENCE:
Expertise in System Verilog, methodology based testbench architectures such as UVM, and System Verilog assertions
Expertise in code and functional coverage,
Excellent Problem solving and debugging skills.
Excellent Communication skills
Strong digital design knowledge, SoC design flow
Knowledge on AMS designs (SERDES or Memory PHYs such as DDR, GDDR) and Mixed signal verification methodology is an added advantage.
UPF based RTL low power verification
ACADEMIC CREDENTIALS:
Bachelor or Masters degree in ECE/EEE desired
LOCATION:
Bangalore
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
SMTS SILICON DESIGN ENGINEER
THE ROLE:
The ideal candidate will get to work on Verification of complex Analog Mixed Signal IPs (with significant Digital and Analog content) that are delivered to various AMD SoCs.
KEY RESPONSIBILITIES:
Verification of IP features : Feature Test plan creation, Verification of the IP in RTL, Gatesim and Analog Mixed Signal simulations.
Create methodology-based (UVM) verification testbenches and components from scratch for various IP features.
Quality deliverables through regressions
Verification coverage: code-coverage, functional coverage, assertions, to achieve 100% verification completeness
Reviews, and feedback to design/architecture teams.
PREFERRED EXPERIENCE:
Expertise in System Verilog, methodology based testbench architectures such as UVM, and System Verilog assertions
Expertise in code and functional coverage,
Excellent Problem solving and debugging skills.
Excellent Communication skills
Strong digital design knowledge, SoC design flow
Knowledge on AMS designs (SERDES or Memory PHYs such as DDR, GDDR) and Mixed signal verification methodology is an added advantage.
UPF based RTL low power verification
ACADEMIC CREDENTIALS:
Bachelor or Masters degree in ECE/EEE desired
LOCATION:
Bangalore