Digital Design Engineer (AP)

Cirrus Logic logo

Cirrus Logic

Edinburgh , Scotland
Verilog SystemVerilog FPGA RTL UVM Digital Design Place and Route Synthesis DFT SOC Verification
Apply Now Posted July 30, 2026 Please mention FPGAjobs in your application — it helps a lot!
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! 

Cirrus Logic is seeking highly skilled Digital IC Design Engineers to join product development teams within the successful High performance mixed-signal R&D division, responsible for developing industry leading SOCs for global consumer mobile markets. In return, we offer an incredible work culture where individual value is key, along with personal/professional development dictated by you. Working at the forefront of technology, this role is based in our Edinburgh office. 

Responsibilities:
  • Collaborate with a team of engineers with responsibility for the delivery of complex mixed-signal products and IPs
  • Design and develop new digital circuit architectures on advanced process nodes including development of block level testbenches
  • Contribute to technical reviews and ensure IP quality using checklists
  • Influence the growth of the group through recruitment, mentoring, review, and supervision of junior engineers.
    • Required Skills and Qualifications:
  • Bachelor’s, Master's or Doctorate degree in Electrical Engineering and/or equivalent with an extensive proven background in digital CMOS circuit design
  • Implementation of complex digital circuits and sub-systems in RTL using Verilog / SystemVerilog
  • Understanding of digital system-level design, including use of standard bus protocols, bus architecture design and chip-level clock and reset architectures.
  • Verification of block-level digital designs
  • Understanding of synthesis and timing analysis of digital circuits; collaboration with DFT and Place and Route team
  • Good understanding of Linting, CDC and RDC tools
  • Good interpersonal skills, share technical expertise and knowledge, contribute to design reviews, work optimally to resolve conflicts.
  • Organised, detailed, and meticulous with strong communication skills.
  • Self-motivated with strong analytical and problem-solving skills
  • Ability to work with a sense of urgency and thrive in a dynamic environment.
    • Preferred Skills and Qualifications:
  • An understanding, appreciation, and passion for mixed signal engineering 
  • Experience working within UVM based verification environments.
  • Scripting and automation of design tasks
  • Experience with AMBA, SPI, I2C protocols 
  • Experience of targeting industry standard FPGA platforms
  • DSP filter design using MATLAB and signal analysis techniques.
  • Lab and silicon validation skills; Experience of chip bring-up and debug from design perspective.
  • Board level interface standards and interface design
  • Experience with clock generation circuits and handling multiple clock domains.
  • Experience with Power gating and low power design techniques
  • Experience with ARM, 8051 microcontrollers as well as memory controllers

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