We are currently searching for a GFX Digital Design Verification Engineer who wants to join a dynamic team and take their technical knowledge to the next level in our mission of excellence.
Your tasks include the full Digital Design Verification (Functional, Formal, Power-aware, Pre-Si validation etc.) and support Design and Systems.

In your new role you will:

• Drive reviewing the IP micro-architecture, run Pre-Silicon functional& power-aware and formal verification for performance-critical algorithmic blocks of next-generation Video/GFX;
• Take ownership of a feature verification by setting up the verification plan, testbench development, test content development and adapt verification components for a coverage driven verification flow;
• Define and run the simulation model; finding and implementing corrective measures for failing tests. Analyzing and using results to modify testing;
• Improve the effectiveness, efficiency and velocity of high speed and high complexity design verification;
• Be able to deal with RTL in Verilog and SV; experience on running on emulation and Gate-level simulation;
• Drive collaboration with multi-disciplinary international teams (Architects, Design, Validation, Application, Software, SoC, …) to ensure the best solution for customers under tight schedule;
• Be responsible for technical documentation and scripting, while continuously improving verification and development methodologies.

You have a structured work style and demonstrate high-quality standards for yourself and other people. As a true team player, you set the direction in your field of expertise and cooperate across boundaries by recognizing and using different areas of expertise and skills of the team members. You enjoy developing your knowledge and skills and motivate yourself and others to achieve top performance. Furthermore, you demonstrate strong communication skills and know-how to establish lasting relationships and networks.

You are best equipped for this task if you have:

• A degree in Electrical Engineering, Microelectronics, Physics or a similar field
• At least 5 years of relevant work experience in logic verification and excellent knowledge about logic verification techniques; Experience in leading a verification feature would be a big plus
• Hands-on know-how on constraint random verification methodology, verification requirements and applications, e.g. SystemVerilog UVM and formal verification and coverage closure
• Deep understanding of testbench architecture, experience in developing System Verilog assertions and checkers, UVC (BFM, Monitors, Scoreboard.) as well as in leading simulation tools for design verification
• Good knowledge on emulation/validation and scripting would be a plus; strong commitment to drive continuous improvement and innovation
• Familiarity with Graphics/Video/DSP/Camera subsystem is a big plus
• Very good English language skills – German would be beneficial

Please send us your CV in English.