RTL Jobs in Arizona

Security Verification/Validation Engineer Intern, BS - Summer 2027

Marvell Chandler, Arizona

Verilog System Verilog

3h

RF/Analog Design/Mixed-Signal Engineering Internship – Summer 2027

Qualcomm Multiple locations

Verilog SystemVerilog

5d

Senior CPU RTL Design Engineer

Intel Multiple locations

Verilog System Verilog

6d

RTL Design Engineer

Intel Multiple locations

VHDL Verilog

9d

Senior DFT Logic Design Engineer

Intel Multiple locations

ASIC RTL

9d

Senior Technical Staff Engineer - SOC Verification

Microchip Technology Chandler, Arizona

SystemVerilog RTL

13d

Senior FPGA Engineer II

Rocket Lab Tucson, Arizona

VHDL FPGA

18d

Technical Staff Engineer - Verification

Microchip Technology Multiple locations

Verilog System Verilog

28d

Principal Engineer Electrical

Northrop Grumman Gilbert, Arizona

Verilog System Verilog

1mo

Principal Engineer- Design (FPGA)

Microchip Technology Chandler, Arizona

Verilog SystemVerilog

1mo

Senior Technical Staff Engineer - Verification

Microchip Technology Chandler, Arizona

Verilog SystemVerilog

1mo

Technical Staff Engineer - Design

Microchip Technology Chandler, Arizona

VHDL Verilog

1mo

Technical Staff Engineer - Design Implementation

Microchip Technology Chandler, Arizona

RTL Digital Design

1mo

Technical Staff Engineer - Verification

Microchip Technology Multiple locations

Verilog System Verilog

1mo

Senior Engineer I- Design

Microchip Technology Chandler, Arizona

Verilog SystemVerilog

1mo

Technical Staff Engineer - Design

Microchip Technology Chandler, Arizona

Verilog System Verilog

1mo

Hardware Designer

Fidus Systems Multiple locations

Remote Verilog FPGA

1mo