SystemVerilog Jobs in Occitanie

Browse open SystemVerilog positions in Occitanie for FPGA, ASIC, and RTL engineers.

All Locations California 200 Texas 91 Austin, TX 86 Santa Clara, CA 64 Bangalore 59 Telangana 41 Hyderabad 41 Ontario 34

Stage Ingénieur : Génération semi-automatique de modèles, stimuli et testbenches par agents IA (F/H)

NXP Semiconductors Toulouse, Occitanie

VHDL Verilog

1d

Stage Ingénieur : Génération de VIP et d’assertions pour IP mixtes par agents IA (F/H)

NXP Semiconductors Toulouse, Occitanie

SystemVerilog RTL

1d

Principal Digital Design Engineer

NXP Semiconductors Multiple locations

VHDL SystemVerilog

1mo

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