AI Develop Intern

NXP Semiconductors logo

NXP Semiconductors

Shanghai , Shanghai , China
Verilog ASIC RTL DFT SOC
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Responsibilities:

 

  • Develop AI agents and automation tools to support SOC Frontend Design.
  • Evaluating and deploying AI technologies to optimize frontend design workflows and improve engineering productivity.
  • Support  RTL/DFT design and integration on NXP MCU and MPU platforms

 

Requirements:

  • Currently pursuing a Master or Doctor's degree in Micro-Electronics/Electronics or related.
  • Familiar with SOC or ASIC design flow
  • Basic knowledge of LLMs and AI Agent concepts. Strong interest on AI application development
  • Proficiency in Verilog programming
  • Good English reading and writing skills


More information about NXP in Greater China...

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