41 open FPGA & RTL jobs at Tenstorrent
41 open logic design roles at Tenstorrent.
ASIC jobs DFT jobs RTL jobs SOC jobs STA jobs SystemVerilog jobs UVM jobs Verification jobs Verilog jobs California Central Banat District Karnataka Massachusetts Ontario Texas
Front End Design Verification Engineer
Physical Design CPU Methodology Engineer
Sr. Staff Engineer, SoC Design Verification
CPU Core Design Verification Manager
Sr. Staff Engineer, CPU (Front-End) Verification
System IP RTL Design Lead
Staff Engineer, Diagnostic Development
Sr. Engineer, SoC Design Verification Engineer, System Management Controller
Physical Design Engineer, AI Accelerator IP
Staff Design Verification Engineer, AI HW
Verification Engineer
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