UVM Jobs

VLSI Logic Design Intern

HPE Juniper Networks Chippewa Falls, Wisconsin, United States of America

Verilog System Verilog

9h

VLSI Design Verification Intern

HPE Juniper Networks Ft. Collins, Colorado, United States of America

VHDL Verilog

9h

VLSI Logic Design Intern

HPE Juniper Networks Ft. Collins, Colorado, United States of America

Verilog System Verilog

9h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

9h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

9h

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

9h

Project Engineer II – FPGA Lead & Design Engineer

BAE Systems Westminster, Colorado

VHDL Verilog

9h

Senior Engineer IP Verification - Digital Design Verification

Micron Hyderabad, Telangana

RTL UVM

10h

Staff Engineer IP Verification - Digital Design Verification

Micron Hyderabad, Telangana

RTL UVM

10h

NOC DV Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10h

NOC DV Sr Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10h

NPU Design Verification Sr Lead Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

10h

NPU Staff Design Verification Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

10h

DV Power Vectors & Window Extraction Engineer (Staff/Sr Staff)

Qualcomm Bangalore, India

FPGA RTL

1d

Pre-Silicon Verification Engineer

Intel Multiple locations

Verilog System Verilog

3d

Design Verification Engineer 2

Lattice Semiconductor Pune, Maharashtra

Verilog System Verilog

3d

IC/FPGA Design Verification Engineer, Sr Staff

Qualcomm Ottawa, Ontario

SystemVerilog FPGA

3d

ASIC/FPGA Design Verification Engineer, Senior

Qualcomm Ottawa, Ontario

Verilog SystemVerilog

3d

ASIC Engineer Intern

HPE Juniper Networks Sunnyvale, California

SystemVerilog ASIC

3d

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA Santa Clara, California

SystemVerilog ASIC

3d