UVM Jobs in Santa Clara, CA

Browse open UVM positions in Santa Clara, CA for FPGA, ASIC, and RTL engineers.

All Locations California 141 Bangalore 72 Texas 60 Austin, TX 58 Santa Clara, CA 48 Telangana 44 Hyderabad 44 Karnataka 35

Custom SOC IP Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

5d

Midcore Design Verification Engineer

Tenstorrent Santa Clara, California

SystemVerilog ASIC

5d

Front End Design Verification Engineer

Tenstorrent Santa Clara, California

SystemVerilog ASIC

6d

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Santa Clara, California

Verilog SystemVerilog

8d

Staff Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog ASIC

8d

Senior Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog RTL

8d

Design Verification Engineer

Intel Santa Clara, California

SystemVerilog FPGA

11d

Sr. Staff Engineer, SoC Design Verification

Tenstorrent Multiple locations

UVM SOC

12d

Senior Firmware Verification and Bringup Engineer

NVIDIA Santa Clara, California

SystemVerilog RTL

13d

Design for Test Intern, BS - Summer 2027

Marvell Multiple locations

UVM DFT

17d

Design Verification Intern, BS - Summer 2027

Marvell Multiple locations

VHDL ASIC

17d

Design Verification Intern, MS - Summer 2027

Marvell Multiple locations

VHDL ASIC

17d

Sr. Staff Engineer, CPU (Front-End) Verification

Tenstorrent Multiple locations

SystemVerilog RTL

17d

ASIC Design Verification Engineer (Santa Clara, CA)

Qualcomm Santa Clara, California

Verilog SystemVerilog

18d

Senior Design Verification Engineer - Neuromorphic Computing

Intel Multiple locations

ASIC RTL

20d

Senior Verification Engineer, SoC

NVIDIA Multiple locations

Verilog System Verilog

21d

GPU Design Verification Engineer

Qualcomm Multiple locations

VHDL Verilog

21d

Design Verification Engineer — Memory Subsystem

Qualcomm Santa Clara, California

Verilog SystemVerilog

24d

Sr. Engineer, SoC Design Verification Engineer, System Management Controller

Tenstorrent Multiple locations

SystemVerilog UVM

26d

NVIDIA 2027 Internships: Hardware Verification

NVIDIA Santa Clara, California

VHDL Verilog

1mo

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