STA Jobs

NPU/AI Processor Synthesis -Staff Engineer

Qualcomm Bangalore, India

ASIC RTL

27d

Implementation Timing / STA Design Engineer

Qualcomm San Diego, California

ASIC RTL

27d

GPU PD Engineer (Austin/San Diego)

Qualcomm San Diego, California

Verilog System Verilog

27d

Senior Physical Design Engineer

Analog Devices Multiple locations

ASIC RTL

28d

Senior Digital Design Engineer

NXP Semiconductors Pune, Maharashtra

Verilog System Verilog

28d

Senior Physical Design Engineer

NXP Semiconductors Pune, Maharashtra

RTL STA

28d

ASIC Physical Verification Lead

NXP Semiconductors Pune, Maharashtra

ASIC RTL

28d

SLD Avionics FPGA Engineer III - Lunar Permanence

Blue Origin Denver, Colorado

VHDL Verilog

29d

ASIC DFT Engineer

Broadcom San Jose, California

Verilog ASIC

1mo

Principal FPGA Digital Design Engineer - Signing Bonus

BAE Systems Nashua, New Hampshire

VHDL Verilog

1mo

Digital Design Engineer Intern

Analog Devices Multiple locations

VHDL Verilog

1mo

Senior SRAM Engineer

NVIDIA Santa Clara, California

Verilog Static Timing

1mo

Design Engineer - STA

Broadcom Fort Collins, Colorado

ASIC STA

1mo

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal

Celero Communications, Inc. Ottawa, Ontario

Verilog SystemVerilog

1mo

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal

Celero Communications, Inc. Irvine, California

Verilog SystemVerilog

1mo

Associate Digital Design Engineer

Analog Devices Durham, North Carolina

Verilog SystemVerilog

1mo

CPU Physical Design Engineer

Intel Bangalore, India

VHDL Verilog

1mo

Physical Design Power Optimization and Modeling Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Place and Route

1mo

Senior STA Signoff Methodology Engineer

NVIDIA Multiple locations

ASIC STA

1mo

Principal/ Sr. Principal FPGA Design Engineer

Northrop Grumman Rolling Meadows, Illinois

VHDL Verilog

1mo