STA Jobs

Physical Design Engineer, Timing

Tenstorrent Multiple locations

STA Static Timing

20h

Physical Design Intern

Ambiq Micro, Inc. Singapore, Central Singapore

VHDL Verilog

21h

NSP STA/Timing Engineer

Qualcomm Bangalore, India

FPGA ASIC

1d

Physical Design Engineer

Qualcomm Markham, Ontario

ASIC RTL

1d

Senior SoC Physical Design Engineer

Qualcomm Bangalore, India

FPGA ASIC

1d

Principal FPGA Digital Engineer - 3

Northrop Grumman Chandler, Arizona

VHDL Verilog

1d

Digital IC Design Intern, BS - Summer 2027

Marvell Multiple locations

Verilog ASIC

1d

Digital IC Design Intern, MS - Summer 2027

Marvell Multiple locations

Verilog ASIC

1d

Principal Physical Design Engineer

Celero Communications, Inc. San Jose, California

ASIC RTL

1d

Principal Physical Design Engineer

Celero Communications, Inc. Irvine, California

ASIC RTL

1d

Senior Digital Design Engineer - MCU

NXP Semiconductors Catania, Sicily

Verilog SystemVerilog

2d

Director, Digital Design

Analog Devices Bangalore, India

FPGA ASIC

4d

Staff Engineer – DFT Engineering

Analog Devices Multiple locations

ASIC RTL

4d

Principal Digital Design Engineer

NXP Semiconductors Chandler (Office)

Verilog SystemVerilog

4d

Senior Chip Design Engineer

NVIDIA Beer Sheva, Israel

VHDL Verilog

4d

Principal Digital Engineer or Sr. Principal Digital Engineer

Northrop Grumman Multiple locations

VHDL FPGA

4d

FPGA Design Senior Engineer

BAE Systems Nashua, New Hampshire

VHDL Verilog

4d

Senior Lead Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

4d

Senior Physical Design Engineer

Qualcomm Noida, Uttar Pradesh

ASIC STA

4d

High Performance DSP core Implementation(Synthesis) Senior Staff Engineer

Qualcomm Noida, Uttar Pradesh

VHDL Verilog

4d