VHDL Jobs in Santa Clara, CA

Design Verification Graduate Intern 2027

Intel Multiple locations

VHDL Verilog

18d

Microarchitecture and Design Engineer - AI SoC

Intel Multiple locations

VHDL Verilog

23d

Senior ASIC Design Engineer - Memory Subsystem

NVIDIA Santa Clara, California

VHDL Verilog

25d

ASIC Verification Engineer - New College Grad 2027

NVIDIA Santa Clara, California

VHDL Verilog

25d

Principal GPU Memory Architect

NVIDIA Santa Clara, California

VHDL Verilog

1mo

CPU Server Physical Design Engineer, Santa Clara

Qualcomm Santa Clara, California

VHDL Verilog

1mo

CPU Verification Engineer, Director

Qualcomm Santa Clara, California

VHDL Verilog

1mo

Senior GPU Memory Architect

NVIDIA Multiple locations

VHDL Verilog

1mo

Principal EDA R&D Engineer

NVIDIA Multiple locations

VHDL Verilog

1mo

CPU Micro-architect/RTL Designer

Qualcomm Multiple locations

VHDL Verilog

2mo

CPU Micro-architect/RTL Designer (Multiple Locations)

Qualcomm Multiple locations

VHDL Verilog

2mo

Design Verification Intern, BS - Summer 2027

Marvell Multiple locations

VHDL ASIC

2mo

Design Verification Intern, MS - Summer 2027

Marvell Multiple locations

VHDL ASIC

2mo

GPU Design Verification Engineer

Qualcomm Santa Clara, California

VHDL Verilog

2mo

CPU DFT Engineer

Qualcomm Santa Clara, California

VHDL Verilog

2mo

CPU Micro-Architecture and RTL Design Engineer (RISC-V)

Qualcomm Multiple locations

VHDL Verilog

2mo

GPU Design Verification Engineer

Qualcomm Multiple locations

VHDL Verilog

2mo

Power Management IC Design

Qualcomm Santa Clara, California

VHDL Verilog

2mo

Staff Engineer - Power Management IC Design

Qualcomm Santa Clara, California

VHDL Verilog

2mo

CPU Systems RTL Engineer

Qualcomm Multiple locations

VHDL Verilog

2mo