SystemVerilog Jobs

Senior Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog RTL

10d

Senior Design Verification Engineer – CPU Core Verification (Vector)

SiFive Multiple locations

SystemVerilog RTL

10d

Modem design/RTL (Sr Staff)

Qualcomm Bangalore, India

VHDL Verilog

12d

FY27 Intern - Compute DSP/AI Processor Engineering Internship - Canada (16 months)

Qualcomm Markham, Ontario

VHDL Verilog

12d

Analog Mixed-Signal IC Design Engineer (Custom Digital Timing Characterization and Liberty Modeling) – TeraWave

Blue Origin San Diego, California

Verilog SystemVerilog

12d

Ph.D. Intern - Architecture, DSP & Systems Architecture

Marvell Multiple locations

Verilog SystemVerilog

12d

Senior FPGA Verification Engineer

Anduril Boulder, Colorado

VHDL Verilog

12d

Senior FPGA Verification Engineer

Anduril Goleta, California

VHDL Verilog

12d

Senior FPGA Verification Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

12d

Senior Firmware Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

12d

Senior Embedded Engineer

Anduril Waltham, Massachusetts

VHDL Verilog

12d

Design Verification Engineer - Compute

MatX Mountain View, California

Remote SystemVerilog UVM

12d

Senior Engineer, Design Verification Engineering

Analog Devices Egypt, New Cairo

SystemVerilog FPGA

13d

Design Verification Engineer

Intel Santa Clara, California

SystemVerilog FPGA

13d

​​Digital Signal Processing Engineer​

Semtech Meylan, Auvergne-Rhône-Alpes

SystemVerilog RTL

13d

Senior Verification Engineer, PCIE

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

13d

Senior Technical Staff Engineer - SOC Verification

Microchip Technology Chandler, Arizona

SystemVerilog RTL

13d

Emulation Performance/Debug Engineer

Qualcomm San Diego, California

Verilog SystemVerilog

13d

Pre-Silicon Verification Engineer - Hod Hasharon

Qualcomm Hod HaSharon, Central District

SystemVerilog ASIC

14d

BT - Design Verification Sr Engineer

Qualcomm Bangalore, India

Verilog SystemVerilog

14d